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Searched refs:SEDI_REG_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_intel-3.6.0/bsp_sedi/soc/intel_ish/pm/
Dpm_regs.h200 #define ISH_WDT_BASE SEDI_REG_BASE(WDT)
206 #define ISH_RST_REG (SEDI_REG_BASE(IPC_HOST) + 0x10000 + 0x44)
207 #define IPC_PIMR_CIM_SEC (SEDI_REG_BASE(IPC_HOST) + 0x10000 + 0x10)
208 #define IPC_UMA_RANGE_LOWER_1 (SEDI_REG_BASE(IPC_HOST) + 0x384)
209 #define IPC_ISH2HOST_DOORBELL_ADDR (SEDI_REG_BASE(IPC_HOST) + 0x54)
/hal_intel-3.6.0/bsp_sedi/drivers/ipc/
Dsedi_ipc.c97 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_HOST),
101 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_CSME),
105 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_PMC),
110 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_HOST),
113 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_CSME),
116 { .reg_base_addr = (sedi_ipc_regs_t *)SEDI_REG_BASE(IPC_PMC),
/hal_intel-3.6.0/bsp_sedi/soc/common/include/
Dsedi_reg_defs.h35 #define SEDI_REG_BASE(_comp) SEDI_##_comp##_REG_BASE macro
113 static const uint32_t SEDI_REG_BASE(_comp) = (_base_addr)
168 ((volatile SEDI_REGT(_comp, _reg) *)(SEDI_REG_BASE(_comp) + SEDI_REGO(_comp, _reg)))