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Searched refs:cfg_low (Results 1 – 2 of 2) sorted by relevance

/hal_intel-3.5.0/bsp_sedi/drivers/dma/
Dsedi_dma_ann_1p0.c226 SET_BITS(chan_regs->cfg_low, WR_SNP_LOC, WR_SNP_LEN, 0); in config_snoop()
227 SET_BITS(chan_regs->cfg_low, RD_SNP_LOC, RD_SNP_LEN, 0); in config_snoop()
228 SET_BITS(chan_regs->cfg_low, RD_LLP_SNP_LOC, RD_LLP_SNP_LEN, 1); in config_snoop()
229 SET_BITS(chan_regs->cfg_low, RD_STAT_SNP_LOC, RD_STAT_SNP_LEN, 1); in config_snoop()
230 SET_BITS(chan_regs->cfg_low, WR_STAT_SNP_LOC, WR_STAT_SNP_LEN, 1); in config_snoop()
231 SET_BITS(chan_regs->cfg_low, WR_CTLHI_SNP_LOC, WR_CTLHI_SNP_LEN, 1); in config_snoop()
389 SET_BITS(chan_regs->cfg_low, DST_HS_POL_LOC, DST_HS_POL_LEN, in dma_apply_other_regs()
391 SET_BITS(chan_regs->cfg_low, SRC_HS_POL_LOC, SRC_HS_POL_LEN, in dma_apply_other_regs()
393 SET_BITS(chan_regs->cfg_low, HSHAKE_NP_WR_LOC, HSHAKE_NP_WR_LEN, in dma_apply_other_regs()
628 regs->misc_reg.cfg_low = 1; in sedi_dma_start_transfer_aux()
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Dsedi_dma_ann_1p0.h37 __IO_RW uint32_t cfg_low; /**< CFG */ member
90 __IO_RW uint32_t cfg_low; /**< DmaCfgReg */ member