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Searched refs:MISC_REG_BASE (Results 1 – 1 of 1) sorted by relevance

/hal_intel-3.5.0/bsp_sedi/soc/intel_ish/pm/
Dpm_regs.h124 #define MISC_REG_BASE SEDI_MISC_BASE macro
133 #define MISC_ISH_RTC_COUNTER0 (MISC_REG_BASE + 0x70)
134 #define MISC_ISH_RTC_COUNTER1 (MISC_REG_BASE + 0x74)