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Searched refs:ISH_GPIO_BASE (Results 1 – 1 of 1) sorted by relevance

/hal_intel-3.5.0/bsp_sedi/soc/intel_ish/pm/
Dpm_regs.h175 #define ISH_GPIO_BASE SEDI_GPIO_0_REG_BASE macro
176 #define ISH_GPIO_GCCR (ISH_GPIO_BASE + 0x000)
177 #define ISH_GPIO_GPLR (ISH_GPIO_BASE + 0x004)
178 #define ISH_GPIO_GPDR (ISH_GPIO_BASE + 0x01C)
179 #define ISH_GPIO_GPSR (ISH_GPIO_BASE + 0x034)
180 #define ISH_GPIO_GPCR (ISH_GPIO_BASE + 0x04C)
181 #define ISH_GPIO_GRER (ISH_GPIO_BASE + 0x064)
182 #define ISH_GPIO_GFER (ISH_GPIO_BASE + 0x07C)
183 #define ISH_GPIO_GFBR (ISH_GPIO_BASE + 0x094)
184 #define ISH_GPIO_GIMR (ISH_GPIO_BASE + 0x0AC)
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