1 /*
2  * Copyright (c) 2023 Intel Corporation
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef _IPC_BSP_H_
8 #define _IPC_BSP_H_
9 
10 #include <sedi_driver_common.h>
11 #include <sedi_driver_ipc.h>
12 
13 #define SEDI_S0Ix_SUPPORT 0
14 /* TODO: remove this macro and logic while sideband driver is ready */
15 #undef SEDI_SB_SUPPORT
16 
17 #define SEDI_IPC_API_VERSION 0
18 /* driver version */
19 #define SEDI_IPC_DRIVER_VERSION SEDI_DRIVER_VERSION_MAJOR_MINOR(0, 1)
20 
21 /* IPC register description */
22 typedef struct {
23 	__IO_RW uint32_t pisr_in;                       /**<PISR_*2LOCAL */
24 	__IO_RW uint32_t pimr_in;                       /**<PIMR_*2LOCAL */
25 	__IO_RW uint32_t pimr_out;                      /**<PIMR_*LOCAL2 */
26 	__IO_RW uint32_t pisr_out;                      /**<PISR_*LOCAL2 */
27 	__IO_RW uint32_t channel_intr_mask;             /**<CIM */
28 	__IO_RW uint32_t channel_intr_st;               /**<CIS */
29 	__IO_R uint32_t reserved0[(0x48 - 0x18) >> 2];
30 	__IO_RW uint32_t drbl_in;                       /**< *2LOCAL DOORBELL */
31 	__IO_R uint32_t reserved1[2];
32 	__IO_RW uint32_t drbl_out;                      /**< LOCAL2* DOORBELL */
33 	__IO_R uint32_t reserved2[2];
34 	__IO_RW uint32_t msgs_out[IPC_DATA_LEN_MAX>>2];     /**< LOCAL2* MSG */
35 	__IO_RW uint32_t msgs_in[IPC_DATA_LEN_MAX>>2];      /**< *2LOCAL MSG */
36 	__IO_R uint32_t reserved3[(0x378 - 0x160) >> 2];
37 	__IO_RW uint32_t ipc_busy_clear_peer2local;
38 	__IO_R uint32_t reserved4[(0x6d4 - 0x37c) >> 2];
39 	__IO_RW uint32_t csr;
40 } ipc_reg_t;
41 
42 #define IPC_LOCAL2PEER_FWSTS 0x34
43 #define IPC_D0I3C_REG 0x6D0
44 #define IPC_D0I3C_INT_BIT 0
45 #define IPC_D0I3C_STATUS_BIT 2
46 
47 #define IPC_BUSY_BIT 31
48 #define IPC_INT_STAT_BIT 0
49 #define IPC_INT_MASK_IN_BIT 0
50 #define IPC_INT_MASK_BC_BIT 11
51 #define IPC_INT_MASK_OUT_BIT 0
52 
53 #define IPC_REG_SB_LOCAL2PMC_DRBL 0x1804
54 #define IPC_REG_SB_LOCAL2PMC_MSG 0x1808
55 #define IPC_REG_SB_PMC2LOCAL_DRBL_MIRROR 0x1888
56 #define IPC_REG_SB_PMC2LOCAL_DRBL_MIRROR 0x1888
57 
58 #define IPC_REG_SB_LOCAL2CSE_CSR 0x3c
59 #define IPC_REG_SB_LOCAL2CSE_DRBL 0x0
60 #define IPC_REG_SB_LOCAL2CSE_MSG 0x40
61 #define IPC_REG_SB_CSE2LOCAL_DRBL_MIRROR 0x4
62 
63 #define SINGLE_BIT 1
64 
65 #define IPC_INT_MASK 0
66 #define IPC_INT_UNMASK 1
67 #endif
68