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Searched refs:IPC_HOST_BASE (Results 1 – 3 of 3) sorted by relevance

/hal_intel-3.5.0/bsp_sedi/soc/intel_ish/pm/
Dpm_regs.h206 #define ISH_RST_REG (IPC_HOST_BASE + 0x10000 + 0x44)
207 #define IPC_PIMR_CIM_SEC (IPC_HOST_BASE + 0x10000 + 0x10)
208 #define IPC_UMA_RANGE_LOWER_1 (IPC_HOST_BASE + 0x384)
209 #define IPC_ISH2HOST_DOORBELL_ADDR (IPC_HOST_BASE + 0x54)
/hal_intel-3.5.0/bsp_sedi/drivers/ipc/
Dsedi_ipc.c72 { .reg_base_addr = (ipc_reg_t *)IPC_HOST_BASE,
85 { .reg_base_addr = (ipc_reg_t *)IPC_HOST_BASE,
535 host_sts = read32(IPC_HOST_BASE + IPC_D0I3C_REG); in sedi_ipc_isr()
537 write32(IPC_HOST_BASE + IPC_D0I3C_REG, host_sts); in sedi_ipc_isr()
/hal_intel-3.5.0/bsp_sedi/soc/intel_ish/include/
Dsedi_soc_regs.h99 #define IPC_HOST_BASE (0x4100000) macro