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Searched refs:DMA_REG_BASE (Results 1 – 2 of 2) sorted by relevance

/hal_intel-3.5.0/bsp_sedi/soc/intel_ish/pm/
Dpm_regs.h125 #define DMA_REG_BASE SEDI_DMA_0_REG_BASE macro
127 #define DMA_MISC_BASE (DMA_REG_BASE + DMA_MISC_OFFSET)
138 #define DMA_CLR_BLOCK_REG (DMA_REG_BASE + 0x340)
139 #define DMA_CLR_ERR_REG (DMA_REG_BASE + 0x358)
140 #define DMA_EN_REG_ADDR (DMA_REG_BASE + 0x3A0)
142 #define DMA_CFG_REG (DMA_REG_BASE + 0x398)
143 #define DMA_PSIZE_01 (DMA_REG_BASE + 0x400)
Dish_dma.c77 uint32_t chan_reg = DMA_REG_BASE + (DMA_CH_REGS_SIZE * chan); in ish_dma_copy()