Home
last modified time | relevance | path

Searched refs:rtsRxFifoLevel (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_scb_uart.c316 CY_ASSERT_L2(CY_SCB_IS_TRIGGER_LEVEL_VALID(base, config->rtsRxFifoLevel)); in Cy_SCB_UART_Init()
363 _VAL2FLD(SCB_UART_FLOW_CTRL_TRIGGER_LEVEL, config->rtsRxFifoLevel); in Cy_SCB_UART_Init()
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_uart.c133 .rtsRxFifoLevel = 20UL,
135 .rtsRxFifoLevel = 3UL,
1306 Cy_SCB_UART_SetRtsFifoLevel(obj->base, _cyhal_uart_default_config.rtsRxFifoLevel); in cyhal_uart_set_async_mode()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_scb_uart.h499 uint32_t rtsRxFifoLevel; member