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/hal_infineon-latest/mtb-template-cat1/
DREADME.md18 * CM0P_SLEEP - Cortex-M0+ pre-built image to start the CM4.
19 * CM0P_CRYPTO - Cortex-M0+ pre-built image to start the CM4 and perform cryptographic operations.
20 * CM0P_BLESS - Cortex-M0+ pre-built image to start the CM4 and perform BLE operations.
21 * CM0P_SECURE - Cortex-M0+ pre-built image for PSoC 64.
/hal_infineon-latest/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_ARM/
Dcy8c6xx7_cm4_dual_cm0p_bless.sct15 ;* This linker script is modified from cy8c6xx7_cm4_dual.sct for CM0P_BLESS image.
18 ;* application image should be placed there.
66 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
69 ; The size of the Cortex-M0+ application flash image
70 ; Size and start address of the Cortex-M0+ application image
111 ; Cortex-M0+ application flash image area
Dcy8c6xx4_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
101 ; Cortex-M0+ application flash image area
Dcy8c6xx7_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
Dcy8c6xx5_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
Dcy8c6xx6_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
Dcy8c6xx8_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
Dcy8c6xxa_cm4_dual.sct16 ;* application image should be placed there.
64 ; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
67 ; The size of the Cortex-M0+ application flash image
108 ; Cortex-M0+ application flash image area
Dcyb06xx5_cm4_dual.sct16 ;* application image should be placed there.
65 ; The size of the Cortex-M0+ application image (including MCU boot header area)
75 ; Cortex-M0+ application flash image area
Dcyb06xx7_cm4_dual.sct16 ;* application image should be placed there.
65 ; The size of the Cortex-M0+ application image (including MCU boot header area)
82 ; Cortex-M0+ application flash image area
/hal_infineon-latest/mtb-template-cat1/files/templates/cat1a/COMPONENT_MTB/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/
Dcy8c6xx7_cm4_dual_cm0p_bless.ld7 * This linker script is modified from cy8c6xx7_cm4_dual.ld for CM0P_BLESS image.
14 * application image should be placed there.
87 /* Size and start address of the Cortex-M0+ application image */
90 /* Size and start address of the Cortex-M4 application image */
133 /* Cortex-M0+ application image */
143 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
144 /* Cortex-M4 application image */
293 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xx4_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
126 /* Cortex-M0+ application flash image area */
136 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
286 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xx5_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
132 /* Cortex-M0+ application flash image area */
142 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
292 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xx6_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
132 /* Cortex-M0+ application flash image area */
142 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
292 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xx7_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
132 /* Cortex-M0+ application flash image area */
142 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
292 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xx8_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
132 /* Cortex-M0+ application flash image area */
142 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
292 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcy8c6xxa_cm4_dual.ld12 * application image should be placed there.
46 /* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core.
50 /* The size of the Cortex-M0+ application image at the start of FLASH */
132 /* Cortex-M0+ application flash image area */
142 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
292 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcyb06xx5_cm4_dual.ld12 * application image should be placed there.
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
117 /* Cortex-M0+ application flash image area */
127 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
277 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcyb06xx7_cm4_dual.ld12 * application image should be placed there.
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
123 /* Cortex-M0+ application flash image area */
133 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
283 * any space in the image. The NOLOAD attribute changes the .bss type to
Dcyb06xxa_cm4_dual.ld12 * application image should be placed there.
49 /* The size of the Cortex-M0+ application image (including MCU boot header area) */
123 /* Cortex-M0+ application flash image area */
133 …ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4,…
283 * any space in the image. The NOLOAD attribute changes the .bss type to
/hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/src/
Dwhd_clm.c76 uint8_t *image; in whd_process_clm_data() local
109 …whd_get_resource_block(whd_driver, WHD_RESOURCE_WLAN_CLM, i, (const uint8_t **)&image, &size_read); in whd_process_clm_data()
121 memcpy(chunk_buf + data_offset, &image[transfer_progress], chunk_len); in whd_process_clm_data()
/hal_infineon-latest/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM7/TOOLCHAIN_GCC_ARM/
Dxmc7200_x8384_cm7.ld12 * application image should be placed there.
147 …/* Cortex-M0+ application flash image area. Comment this section if you don't want to include CM0+…
157 …ASSERT(__cy_m0p_code_end < ORIGIN(flash), "CM0+ flash image overflows with CM7, increase CM7 base …
328 * any space in the image. The NOLOAD attribute changes the .bss type to
Dxmc7100_x1088_cm7.ld12 * application image should be placed there.
145 …/* Cortex-M0+ application flash image area. Comment this section if you don't want to include CM0+…
155 …ASSERT(__cy_m0p_code_end < ORIGIN(flash), "CM0+ flash image overflows with CM7, increase CM7 base …
326 * any space in the image. The NOLOAD attribute changes the .bss type to
Dxmc7100_x2112_cm7.ld12 * application image should be placed there.
145 …/* Cortex-M0+ application flash image area. Comment this section if you don't want to include CM0+…
155 …ASSERT(__cy_m0p_code_end < ORIGIN(flash), "CM0+ flash image overflows with CM7, increase CM7 base …
326 * any space in the image. The NOLOAD attribute changes the .bss type to
Dxmc7100_x4160_cm7.ld12 * application image should be placed there.
147 …/* Cortex-M0+ application flash image area. Comment this section if you don't want to include CM0+…
157 …ASSERT(__cy_m0p_code_end < ORIGIN(flash), "CM0+ flash image overflows with CM7, increase CM7 base …
328 * any space in the image. The NOLOAD attribute changes the .bss type to

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