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/hal_infineon-latest/mtb-pdl-cat1/drivers/third_party/ethernet/src/
Dedd_tx.c89 uint8_t enabled = 0; in emacCalcMaxTxFrameSize() local
94 if (0!=(ret = emacGetTxPartialStFwd(pD, &watermark, &enabled))) in emacCalcMaxTxFrameSize()
97 if (!(enabled) && CEDI_PdVar(hwCfg).tx_pkt_buffer) in emacCalcMaxTxFrameSize()
1022 uint8_t enabled; in emacEnableCbs() local
1033 ret = emacGetCbsQSetting(pD, qSel, &enabled, &tmp); in emacEnableCbs()
1037 if (enabled) in emacEnableCbs()
1095 uint32_t reg, enabled; in emacGetCbsQSetting() local
1105 enabled = EMAC_REGS__CBS_CONTROL__CBS_ENABLE_QUEUE_B__READ(reg); in emacGetCbsQSetting()
1106 if (enabled && (idleSlope!=NULL)) { in emacGetCbsQSetting()
1112 enabled = EMAC_REGS__CBS_CONTROL__CBS_ENABLE_QUEUE_A__READ(reg); in emacGetCbsQSetting()
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Dedd_rx.c57 uint8_t enabled = 0; in emacCalcMaxRxFrameSize() local
62 if (0!=emacGetJumboFramesRx(pD,&enabled)) in emacCalcMaxRxFrameSize()
65 if (enabled) { in emacCalcMaxRxFrameSize()
70 if (0!=emacGet1536ByteFramesRx(pD,&enabled)) in emacCalcMaxRxFrameSize()
72 if (enabled) in emacCalcMaxRxFrameSize()
78 if (0!=emacGetRxPartialStFwd(pD, &tmp, &enabled)) in emacCalcMaxRxFrameSize()
81 if ((!enabled) && CEDI_PdVar(hwCfg).rx_pkt_buffer) in emacCalcMaxRxFrameSize()
1369 uint8_t *enabled) in emacGetTypeIdMatch() argument
1373 if ((matchSel<1) || (matchSel>4) || (enabled==NULL)) return EINVAL; in emacGetTypeIdMatch()
1374 if (*enabled && (typeId==NULL)) return EINVAL; in emacGetTypeIdMatch()
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Dedd.c2706 uint8_t enabled; in emacSetJumboFrameRxMaxLen() local
2711 emacGetJumboFramesRx(pD, &enabled); in emacSetJumboFrameRxMaxLen()
2713 if (enabled) in emacSetJumboFrameRxMaxLen()
2717 if (enabled) in emacSetJumboFrameRxMaxLen()
3400 uint8_t enabled = 0; in emacSetPtpRxUnicastIpAddr() local
3401 ret = emacGetUnicastPtpDetect(pD, &enabled); in emacSetPtpRxUnicastIpAddr()
3404 if (enabled) in emacSetPtpRxUnicastIpAddr()
3425 uint8_t enabled = 0; in emacSetPtpTxUnicastIpAddr() local
3426 ret = emacGetUnicastPtpDetect(pD,&enabled); in emacSetPtpTxUnicastIpAddr()
3429 if (enabled) in emacSetPtpTxUnicastIpAddr()
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_clock.c662 static cy_rslt_t _cyhal_clock_set_enabled_unsupported(cyhal_clock_t *clock, bool enabled, bool wait… in _cyhal_clock_set_enabled_unsupported() argument
665 CY_UNUSED_PARAMETER(enabled); in _cyhal_clock_set_enabled_unsupported()
1074 static cy_rslt_t _cyhal_clock_set_enabled_eco(cyhal_clock_t *clock, bool enabled, bool wait_for_loc… in _cyhal_clock_set_enabled_eco() argument
1078 if (enabled) in _cyhal_clock_set_enabled_eco()
1168 static cy_rslt_t _cyhal_clock_set_enabled_iho(cyhal_clock_t *clock, bool enabled, bool wait_for_loc… in _cyhal_clock_set_enabled_iho() argument
1173 if (enabled) in _cyhal_clock_set_enabled_iho()
1197 static cy_rslt_t _cyhal_clock_set_enabled_ilo(cyhal_clock_t *clock, bool enabled, bool wait_for_loc… in _cyhal_clock_set_enabled_ilo() argument
1202 if (enabled) in _cyhal_clock_set_enabled_ilo()
1217 if (enabled) in _cyhal_clock_set_enabled_ilo()
1238 static cy_rslt_t _cyhal_clock_set_enabled_pilo(cyhal_clock_t *clock, bool enabled, bool wait_for_lo… in _cyhal_clock_set_enabled_pilo() argument
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Dcyhal_adc_mic.c141 if(obj->channel_config[*current_idx]->enabled) in _cyhal_adcmic_find_next_channel()
389 channel->enabled = true; in cyhal_adc_init_cfg()
552 obj->enabled = config->enabled; in cyhal_adc_channel_configure()
626 || (false == obj->channel_config[obj->current_channel_index]->enabled)) in _cyhal_adcmic_start_async_read()
Dcyhal_pdmpcm.c448 bool enabled = cyhal_pdm_pcm_is_enabled(obj); in _cyhal_pdm_pcm_pm_callback() local
449 obj->pm_transition_ready = !(enabled || cyhal_pdm_pcm_is_pending(obj)); in _cyhal_pdm_pcm_pm_callback()
Dcyhal_adc_sar.c1483 pdl_cfg->channelHwEnable = cfg->enabled; in _cyhal_adc_channel_update_config()
2220 if(config->enabled) in cyhal_adc_channel_configure()
/hal_infineon-latest/mtb-template-cat1/
DREADME.md15 …enabled by default while others must be explicitly enabled. Items enabled by default are specified…
28 * CY_USING_HAL - This define, enabled by default, specifies that the HAL is intended to be used by …
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/
Dcy_syslib_ext.s63 ; indicating whether interrupts were previously enabled.
66 ; enable bit with interrupts still enabled. The test and set of the interrupt
73 ; Returns 0 if interrupts were previously enabled or 1 if interrupts
91 ; Cy_SysLib_ExitCriticalSection re-enables interrupts if they were enabled
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_sdmmc.h1423 __STATIC_INLINE void XMC_SDMMC_SetReadWaitControl(XMC_SDMMC_t *const sdmmc, bool enabled) in XMC_SDMMC_SetReadWaitControl() argument
1428 … (uint8_t)((uint8_t)enabled << SDMMC_BLOCK_GAP_CTRL_READ_WAIT_CTRL_Pos)); in XMC_SDMMC_SetReadWaitControl()
1443 __STATIC_INLINE void XMC_SDMMC_SetStopAtBlockGap(XMC_SDMMC_t *const sdmmc, bool enabled) in XMC_SDMMC_SetStopAtBlockGap() argument
1448 … (uint8_t)((uint8_t)enabled << SDMMC_BLOCK_GAP_CTRL_STOP_AT_BLOCK_GAP_Pos)); in XMC_SDMMC_SetStopAtBlockGap()
1463 __STATIC_INLINE void XMC_SDMMC_SetContinueRequest(XMC_SDMMC_t *const sdmmc, bool enabled) in XMC_SDMMC_SetContinueRequest() argument
1468 (uint8_t)((uint8_t)enabled << SDMMC_BLOCK_GAP_CTRL_CONTINUE_REQ_Pos)); in XMC_SDMMC_SetContinueRequest()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysclk_v2.c1315 bool enabled; in Cy_SysClk_ClkHfGetMaskOnPath() local
1317 enabled = Cy_SysClk_ClkHfIsEnabled(i); in Cy_SysClk_ClkHfGetMaskOnPath()
1318 if (enabled) in Cy_SysClk_ClkHfGetMaskOnPath()
1336 bool enabled; in Cy_SysClk_ClkHfAllGetMask() local
1337 enabled = Cy_SysClk_ClkHfIsEnabled(i); in Cy_SysClk_ClkHfAllGetMask()
1338 if (enabled) in Cy_SysClk_ClkHfAllGetMask()
3728 bool enabled; /* FLL enable status; n/a for direct */ in Cy_SysClk_FllGetFrequency() local
3733 enabled = (Cy_SysClk_FllIsEnabled()) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != fllCfg.outputMode); in Cy_SysClk_FllGetFrequency()
3738 if (enabled && /* If FLL is enabled and not bypassed */ in Cy_SysClk_FllGetFrequency()
4223 bool enabled; /* PLL enable status; n/a for direct */ in Cy_SysClk_Pll400MGetFrequency() local
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Dcy_sysclk.c2814 bool enabled; /* FLL enable status; n/a for direct */ in Cy_SysClk_FllGetFrequency() local
2819 enabled = (Cy_SysClk_FllIsEnabled()) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != fllCfg.outputMode); in Cy_SysClk_FllGetFrequency()
2824 if (enabled && /* If FLL is enabled and not bypassed */ in Cy_SysClk_FllGetFrequency()
2840 bool enabled = false; /* PLL enable status; n/a for direct */ in Cy_SysClk_PllGetFrequency() local
2852 …enabled = (Cy_SysClk_PllIsEnabled(clkPath)) && (CY_SYSCLK_FLLPLL_OUTPUT_INPUT != pllcfg.outputMode… in Cy_SysClk_PllGetFrequency()
2858 if (enabled && /* If PLL is enabled and not bypassed */ in Cy_SysClk_PllGetFrequency()
Dcy_seglcd.c449 bool enabled = CY_SEGLCD_IS_ENABLED(base); /* Store the block state */ in Cy_SegLCD_Contrast() local
455 if ((CY_SEGLCD_SUCCESS == retVal) && enabled) in Cy_SegLCD_Contrast()
/hal_infineon-latest/mtb-hal-cat1/include/
Dcyhal_clock.h278 cy_rslt_t cyhal_clock_set_enabled(cyhal_clock_t *clock, bool enabled, bool wait_for_lock);
Dcyhal_adc.h223 bool enabled; member
/hal_infineon-latest/mtb-pdl-cat1/drivers/third_party/ethernet/include/
Dedd_int.h312 uint32_t emacGetIpgStretch(void *pD, uint8_t *enabled, uint8_t *multiplier,
384 uint8_t *enabled);
/hal_infineon-latest/mtb-hal-cat1/
DREADME.md40 …enabled. Specifically, events that occur while a given event type is disabled are not queued and w…
52 When using HAL in an RTOS environment with the `RTOS_AWARE` component enabled, initialization of th…
/hal_infineon-latest/mtb-pdl-cat1/device-info/personalities_9.0/peripheral/
Dsar_scheduler-3.0.tcl80 proc construct_timing_info {minAcqAdcClocksNeeded samplesPerScan enabled chanNum} {
82 return [list $minAcqAdcClocksNeeded $samplesPerScan $enabled $chanNum]
/hal_infineon-latest/mtb-pdl-cat1/device-info/personalities/peripheral/
Dsar_scheduler-3.0.tcl80 proc construct_timing_info {minAcqAdcClocksNeeded samplesPerScan enabled chanNum} {
82 return [list $minAcqAdcClocksNeeded $samplesPerScan $enabled $chanNum]
/hal_infineon-latest/mtb-pdl-cat1/device-info/personalities_8.0/peripheral/
Dsar_scheduler-3.0.tcl80 proc construct_timing_info {minAcqAdcClocksNeeded samplesPerScan enabled chanNum} {
82 return [list $minAcqAdcClocksNeeded $samplesPerScan $enabled $chanNum]
/hal_infineon-latest/btstack-integration/COMPONENT_BTSS-IPC/platform/common/
Dcybt_platform_main.c167 event_data.enabled.status = WICED_BT_SUCCESS; in wiced_post_stack_init_cback()
/hal_infineon-latest/abstraction-rtos/
DREADME.md42 …ty when using with FreeRTOS, the following configuration options must be enabled in FreeRTOSConfig…
/hal_infineon-latest/mtb-hal-cat1/include_pvt/
Dcyhal_hw_types.h555 bool enabled; member
/hal_infineon-latest/btstack/wiced_include/
Dwiced_bt_dev.h1294 …wiced_bt_dev_enabled_t enabled; /**< Data for BTM_ENAB… member
/hal_infineon-latest/btstack/
DRELEASE.md133 - Fix for issue where extended advertisement was enabled before random address was set.