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Searched refs:dsClkSource (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysanalog.c159 CY_ASSERT_L3(IS_SRC_VALID(config->dsClkSource)); in Cy_SysAnalog_DeepSleepInit()
165 …SS_DPSLP_CLOCK_SEL(base) = _VAL2FLD(PASS_V2_DPSLP_CLOCK_SEL_DPSLP_CLOCK_SEL, config->dsClkSource) | in Cy_SysAnalog_DeepSleepInit()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_sysanalog.h487 … cy_en_sysanalog_deep_sleep_clock_sel_t dsClkSource; /**< Deep Sleep Clock source select */ member