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Searched refs:data1 (Results 1 – 17 of 17) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_cryptolite_vu.h207 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_mul_hw()
258 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_xmul_hw()
311 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_add_hw()
364 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_sub_hw()
409 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_mov_hw()
454 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_lsl1_hw()
502 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_lsr1_hw()
549 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_lsr_hw()
600 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_xor_hw()
653 p_struct->data1 = (uint32_t) p_a; in Cy_Cryptolite_Vu_cond_sub_hw()
[all …]
Dcy_crypto_core_hw_v1.h78 void Cy_Crypto_SetReg2Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1);
80 void Cy_Crypto_SetReg3Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2);
82 void Cy_Crypto_SetReg4Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2, uint…
Dcy_cryptolite_common.h116 uint32_t data1; member
Dcy_smartio.h469 cy_en_smartio_dudata_t data1; /**< DU input DATA1 source selection */ member
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_lin.c135 uint8_t data1[4]; in Cy_LIN_ReadData() local
153 data1[0] = (uint8_t)_FLD2VAL(LIN_CH_DATA1_DATA5, LIN_CH_DATA1(base)); in Cy_LIN_ReadData()
154 data1[1] = (uint8_t)_FLD2VAL(LIN_CH_DATA1_DATA6, LIN_CH_DATA1(base)); in Cy_LIN_ReadData()
155 data1[2] = (uint8_t)_FLD2VAL(LIN_CH_DATA1_DATA7, LIN_CH_DATA1(base)); in Cy_LIN_ReadData()
156 data1[3] = (uint8_t)_FLD2VAL(LIN_CH_DATA1_DATA8, LIN_CH_DATA1(base)); in Cy_LIN_ReadData()
165 data[cnt] = data1[cnt - 4U]; in Cy_LIN_ReadData()
187 uint8_t data1[4U] = { 0 }; in Cy_LIN_WriteData() local
213 data1[cnt - 4u] = data[cnt]; in Cy_LIN_WriteData()
221 LIN_CH_DATA1(base) = (_VAL2FLD(LIN_CH_DATA1_DATA5, data1[0]) | \ in Cy_LIN_WriteData()
222 _VAL2FLD(LIN_CH_DATA1_DATA6, data1[1]) | \ in Cy_LIN_WriteData()
[all …]
Dcy_crypto_core_hw_v1.c87 void Cy_Crypto_SetReg2Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1) in Cy_Crypto_SetReg2Instr() argument
99 REG_CRYPTO_INSTR_FF_WR(base) = data1; in Cy_Crypto_SetReg2Instr()
124 void Cy_Crypto_SetReg3Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2) in Cy_Crypto_SetReg3Instr() argument
137 REG_CRYPTO_INSTR_FF_WR(base) = data1; in Cy_Crypto_SetReg3Instr()
167 void Cy_Crypto_SetReg4Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2, uint… in Cy_Crypto_SetReg4Instr() argument
181 REG_CRYPTO_INSTR_FF_WR(base) = data1; in Cy_Crypto_SetReg4Instr()
Dcy_cryptolite_sha256.c132 cfContext->message_schedule_struct.data1 = (uint32_t)message; in Cy_Cryptolite_Sha256_Process_aligned()
139 cfContext->message_schedule_struct.data1 = (uint32_t)cfContext->message; in Cy_Cryptolite_Sha256_Process_aligned()
144 cfContext->message_schedule_struct.data1+= CY_CRYPTOLITE_SHA256_BLOCK_SIZE; in Cy_Cryptolite_Sha256_Process_aligned()
147 cfContext->message_schedule_struct.data1 = (uint32_t)cfContext->message; in Cy_Cryptolite_Sha256_Process_aligned()
180 cfContext->message_schedule_struct.data1 = (uint32_t)cfContext->message; in Cy_Cryptolite_Sha256_Init()
184 cfContext->message_process_struct.data1 = (uint32_t)cfContext->hash; in Cy_Cryptolite_Sha256_Init()
Dcy_smartio.c145 … | _VAL2FLD(SMARTIO_PRT_DU_SEL_DU_DATA1_SEL, config->duCfg->data1); in Cy_SmartIO_Init()
/hal_infineon-latest/mtb-template-cat1/files/templates/cat1b/COMPONENT_MTB/COMPONENT_CM33/TOOLCHAIN_GCC_ARM/
Dcyw20829A0_ns_l1ram_cbus.ld59 /* vma for application data1 */
61 /* size of data1 section */
96 data1 (rwx) : ORIGIN = DATA1_VMA, LENGTH = DATA1_SIZE
185 /* Copy data1 section to RAM */
279 .data1 ORIGIN(data1) : AT (__data1_lma__)
291 } > data1
Dcyw20829_ns_l1ram_cbus.ld59 /* vma for application data1 */
61 /* size of data1 section */
96 data1 (rwx) : ORIGIN = DATA1_VMA, LENGTH = DATA1_SIZE
185 /* Copy data1 section to RAM */
279 .data1 ORIGIN(data1) : AT (__data1_lma__)
291 } > data1
Dcyw20829A0_ns_ram_cbus.ld91 … data1 (rwx) : ORIGIN = DATA1_SRAM0_NS_SAHB_START, LENGTH = DATA1_SRAM0_NS_SAHB_SIZE
192 /* Copy data1 section to RAM */
288 .data1 ORIGIN(data1) : AT (__data1_lma__)
300 } > data1
Dcyw20829_ns_ram_cbus.ld91 … data1 (rwx) : ORIGIN = DATA1_SRAM0_NS_SAHB_START, LENGTH = DATA1_SRAM0_NS_SAHB_SIZE
192 /* Copy data1 section to RAM */
288 .data1 ORIGIN(data1) : AT (__data1_lma__)
300 } > data1
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_udb_sdio.c252 …obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0, cyhal_gpio_t data1, cyhal_gpio_t data… in cyhal_sdio_init() argument
275 (data1 == NC) || in cyhal_sdio_init()
299 retVal = _cyhal_sdio_configure_pin(data1, &obj->pin_data1, &_cyhal_sdio_pin_config); in cyhal_sdio_init()
Dcyhal_sdhc.c1582 cyhal_gpio_t data1, in cyhal_sdhc_init_hw() argument
1612 … .cmd = cmd, .clk = clk, .data[0] = data0, .data[1] = data1, .data[2] = data2, .data[3] = data3, in cyhal_sdhc_init_hw()
1678 cyhal_gpio_t data1, in cyhal_sdhc_init() argument
1693 …cy_rslt_t result = cyhal_sdhc_init_hw(obj, config, cmd, clk, data0, data1, data2, data3, data4, da… in cyhal_sdhc_init()
2900 …init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0, cyhal_gpio_t data1, in cyhal_sdio_init() argument
2906 (data1 == NC) || in cyhal_sdio_init()
2935 .gpios = {clk, cmd, { data0, data1, data2, data3 } } in cyhal_sdio_init()
/hal_infineon-latest/mtb-hal-cat1/include/
Dcyhal_sdhc.h345 cyhal_gpio_t data1,
400 cyhal_gpio_t data1,
Dcyhal_sdio.h307 …obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0, cyhal_gpio_t data1, cyhal_gpio_t data…
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_dac.h480 …NE void XMC_DAC_SimultaneousWrite(XMC_DAC_t *const dac, const uint16_t data0, const uint16_t data1) in XMC_DAC_SimultaneousWrite() argument
484 dac->DAC01DATA = (data0 << DAC_DAC01DATA_DATA0_Pos) | (data1 << DAC_DAC01DATA_DATA1_Pos); in XMC_DAC_SimultaneousWrite()