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/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_hw_v1.c56 void Cy_Crypto_SetReg1Instr(CRYPTO_Type *base, uint32_t data0) in Cy_Crypto_SetReg1Instr() argument
66 REG_CRYPTO_INSTR_FF_WR(base) = data0; in Cy_Crypto_SetReg1Instr()
87 void Cy_Crypto_SetReg2Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1) in Cy_Crypto_SetReg2Instr() argument
98 REG_CRYPTO_INSTR_FF_WR(base) = data0; in Cy_Crypto_SetReg2Instr()
124 void Cy_Crypto_SetReg3Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2) in Cy_Crypto_SetReg3Instr() argument
136 REG_CRYPTO_INSTR_FF_WR(base) = data0; in Cy_Crypto_SetReg3Instr()
167 void Cy_Crypto_SetReg4Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2, uint… in Cy_Crypto_SetReg4Instr() argument
180 REG_CRYPTO_INSTR_FF_WR(base) = data0; in Cy_Crypto_SetReg4Instr()
Dcy_lin.c134 uint8_t data0[4]; in Cy_LIN_ReadData() local
149 data0[0] = (uint8_t)_FLD2VAL(LIN_CH_DATA0_DATA1, LIN_CH_DATA0(base)); in Cy_LIN_ReadData()
150 data0[1] = (uint8_t)_FLD2VAL(LIN_CH_DATA0_DATA2, LIN_CH_DATA0(base)); in Cy_LIN_ReadData()
151 data0[2] = (uint8_t)_FLD2VAL(LIN_CH_DATA0_DATA3, LIN_CH_DATA0(base)); in Cy_LIN_ReadData()
152 data0[3] = (uint8_t)_FLD2VAL(LIN_CH_DATA0_DATA4, LIN_CH_DATA0(base)); in Cy_LIN_ReadData()
161 data[cnt] = data0[cnt]; in Cy_LIN_ReadData()
186 uint8_t data0[4U] = { 0 }; in Cy_LIN_WriteData() local
209 data0[cnt] = data[cnt]; in Cy_LIN_WriteData()
217 LIN_CH_DATA0(base) = (_VAL2FLD(LIN_CH_DATA0_DATA1, data0[0]) | \ in Cy_LIN_WriteData()
218 _VAL2FLD(LIN_CH_DATA0_DATA2, data0[1]) | \ in Cy_LIN_WriteData()
[all …]
Dcy_cryptolite_sha256.c179 cfContext->message_schedule_struct.data0 = (uint32_t)CY_CRYPTOLITE_MSG_SCH_CTLWD; in Cy_Cryptolite_Sha256_Init()
183 cfContext->message_process_struct.data0 = (uint32_t)CY_CRYPTOLITE_PROCESS_CTLWD; in Cy_Cryptolite_Sha256_Init()
Dcy_smartio.c144 … | _VAL2FLD(SMARTIO_PRT_DU_SEL_DU_DATA0_SEL, config->duCfg->data0) in Cy_SmartIO_Init()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_cryptolite_vu.h206 …p_struct->data0 = (uint32_t) ((uint32_t)0 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) … in Cy_Cryptolite_Vu_mul_hw()
257 …p_struct->data0 = (uint32_t) ((uint32_t)4 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) … in Cy_Cryptolite_Vu_xmul_hw()
310 …p_struct->data0 = (uint32_t) ((uint32_t)1 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) … in Cy_Cryptolite_Vu_add_hw()
363 …p_struct->data0 = (uint32_t) ((uint32_t)2 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) … in Cy_Cryptolite_Vu_sub_hw()
408 p_struct->data0 = (uint32_t) (9UL << 28U) | ((word_size_z-1U) << 16U) | (word_size_a-1U); in Cy_Cryptolite_Vu_mov_hw()
453 …p_struct->data0 = (uint32_t) ((uint32_t)6 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_a-1U) … in Cy_Cryptolite_Vu_lsl1_hw()
501 …p_struct->data0 = (uint32_t) ((uint32_t)5 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_a-1U) … in Cy_Cryptolite_Vu_lsr1_hw()
548 p_struct->data0 = (uint32_t) ((uint32_t)7 << 28U) | ((word_size_z-1U) << 16U) | (word_size_a-1U); in Cy_Cryptolite_Vu_lsr_hw()
599 …p_struct->data0 = (uint32_t) ((uint32_t)3 << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) … in Cy_Cryptolite_Vu_xor_hw()
652 …p_struct->data0 = (uint32_t) (8UL << 28U) | ((word_size_z-1U) << 16U) | ((word_size_b-1U) << 8U) |… in Cy_Cryptolite_Vu_cond_sub_hw()
[all …]
Dcy_crypto_core_hw_v1.h76 void Cy_Crypto_SetReg1Instr(CRYPTO_Type *base, uint32_t data0);
78 void Cy_Crypto_SetReg2Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1);
80 void Cy_Crypto_SetReg3Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2);
82 void Cy_Crypto_SetReg4Instr(CRYPTO_Type *base, uint32_t data0, uint32_t data1, uint32_t data2, uint…
Dcy_cryptolite_common.h115 uint32_t data0; member
Dcy_smartio.h468 cy_en_smartio_dudata_t data0; /**< DU input DATA0 source selection */ member
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_udb_sdio.c252 cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0… in cyhal_sdio_init() argument
274 (data0 == NC) || in cyhal_sdio_init()
295 retVal = _cyhal_sdio_configure_pin(data0, &obj->pin_data0, &_cyhal_sdio_pin_config); in cyhal_sdio_init()
Dcyhal_sdhc.c1581 cyhal_gpio_t data0, in cyhal_sdhc_init_hw() argument
1612 … .cmd = cmd, .clk = clk, .data[0] = data0, .data[1] = data1, .data[2] = data2, .data[3] = data3, in cyhal_sdhc_init_hw()
1677 cyhal_gpio_t data0, in cyhal_sdhc_init() argument
1693 …cy_rslt_t result = cyhal_sdhc_init_hw(obj, config, cmd, clk, data0, data1, data2, data3, data4, da… in cyhal_sdhc_init()
2900 cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0… in cyhal_sdio_init() argument
2905 (data0 == NC) || in cyhal_sdio_init()
2935 .gpios = {clk, cmd, { data0, data1, data2, data3 } } in cyhal_sdio_init()
/hal_infineon-latest/mtb-hal-cat1/include/
Dcyhal_sdhc.h344 cyhal_gpio_t data0,
399 cyhal_gpio_t data0,
Dcyhal_sdio.h307 cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, cyhal_gpio_t data0…
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_dac.h480 __STATIC_INLINE void XMC_DAC_SimultaneousWrite(XMC_DAC_t *const dac, const uint16_t data0, const ui… in XMC_DAC_SimultaneousWrite() argument
484 dac->DAC01DATA = (data0 << DAC_DAC01DATA_DATA0_Pos) | (data1 << DAC_DAC01DATA_DATA1_Pos); in XMC_DAC_SimultaneousWrite()