| /hal_infineon-latest/abstraction-rtos/include/ |
| D | cyabs_rtos.h | 556 cy_rslt_t cy_rtos_event_setbits(cy_event_t* event, uint32_t bits);
569 cy_rslt_t cy_rtos_event_clearbits(cy_event_t* event, uint32_t bits);
581 cy_rslt_t cy_rtos_event_getbits(cy_event_t* event, uint32_t* bits);
600 cy_rslt_t cy_rtos_event_waitbits(cy_event_t* event, uint32_t* bits, bool clear, bool all,
1156 #define cy_rtos_setbits_event(event, bits, in_isr) cy_rtos_event_setbits(event, bits) argument
1170 #define cy_rtos_clearbits_event(event, bits, in_isr) cy_rtos_event_clearbits(event, bits) argument
1182 #define cy_rtos_getbits_event(event, bits) cy_rtos_event_getbits(event, bits) argument
1201 #define cy_rtos_waitbits_event(event, bits, clear, all, \ argument
1203 cy_rtos_event_waitbits(event, bits, clear, all, timeout_ms)
|
| /hal_infineon-latest/abstraction-rtos/source/COMPONENT_FREERTOS/ |
| D | cyabs_rtos_freertos.c | 771 cy_rslt_t cy_rtos_event_setbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_setbits() argument
784 ret = xEventGroupSetBitsFromISR(*event, (EventBits_t)bits, &xHigherPriorityTaskWoken); in cy_rtos_event_setbits()
797 xEventGroupSetBits(*event, (EventBits_t)bits); in cy_rtos_event_setbits()
817 cy_rslt_t cy_rtos_event_clearbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_clearbits() argument
829 ret = xEventGroupClearBitsFromISR(*event, (EventBits_t)bits); in cy_rtos_event_clearbits()
837 xEventGroupClearBits(*event, (EventBits_t)bits); in cy_rtos_event_clearbits()
857 cy_rslt_t cy_rtos_event_getbits(cy_event_t* event, uint32_t* bits) in cy_rtos_event_getbits() argument
860 if ((event == NULL) || (bits == NULL)) in cy_rtos_event_getbits()
866 *bits = xEventGroupGetBits(*event); in cy_rtos_event_getbits()
876 cy_rslt_t cy_rtos_event_waitbits(cy_event_t* event, uint32_t* bits, bool clear, bool all, in cy_rtos_event_waitbits() argument
[all …]
|
| /hal_infineon-latest/abstraction-rtos/source/COMPONENT_THREADX/ |
| D | cyabs_rtos_threadx.c | 654 cy_rslt_t cy_rtos_event_setbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_setbits() argument
660 return convert_error(tx_event_flags_set(event, bits, TX_OR)); in cy_rtos_event_setbits()
667 cy_rslt_t cy_rtos_event_clearbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_clearbits() argument
674 return convert_error(tx_event_flags_set(event, ~bits, TX_AND)); in cy_rtos_event_clearbits()
681 cy_rslt_t cy_rtos_event_getbits(cy_event_t* event, uint32_t* bits) in cy_rtos_event_getbits() argument
683 if ((event == NULL) || (bits == NULL)) in cy_rtos_event_getbits()
688 cy_rtos_error_t tx_rslt = tx_event_flags_get(event, ALL_EVENT_FLAGS, TX_OR, (ULONG*)bits, in cy_rtos_event_getbits()
693 *bits = 0; in cy_rtos_event_getbits()
706 cy_rslt_t cy_rtos_event_waitbits(cy_event_t* event, uint32_t* bits, bool clear, bool all, in cy_rtos_event_waitbits() argument
711 if ((event == NULL) || (bits == NULL)) in cy_rtos_event_waitbits()
[all …]
|
| /hal_infineon-latest/abstraction-rtos/source/COMPONENT_RTX/ |
| D | cyabs_rtos_rtxv5.c | 726 cy_rslt_t cy_rtos_event_setbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_setbits() argument
737 statusInternal = (osStatus_t)osEventFlagsSet(*event, bits); in cy_rtos_event_setbits()
751 cy_rslt_t cy_rtos_event_clearbits(cy_event_t* event, uint32_t bits) in cy_rtos_event_clearbits() argument
762 statusInternal = (osStatus_t)osEventFlagsClear(*event, bits); in cy_rtos_event_clearbits()
776 cy_rslt_t cy_rtos_event_getbits(cy_event_t* event, uint32_t* bits) in cy_rtos_event_getbits() argument
780 if ((event == NULL) || (bits == NULL)) in cy_rtos_event_getbits()
786 *bits = osEventFlagsGet(*event); in cy_rtos_event_getbits()
796 cy_rslt_t cy_rtos_event_waitbits(cy_event_t* event, uint32_t* bits, bool clear, bool all, in cy_rtos_event_waitbits() argument
803 if ((event == NULL) || (bits == NULL)) in cy_rtos_event_waitbits()
815 statusInternal = (osStatus_t)osEventFlagsWait(*event, *bits, flagOption, timeout_ms); in cy_rtos_event_waitbits()
[all …]
|
| /hal_infineon-latest/mtb-hal-cat1/source/ |
| D | cyhal_wdt.c | 202 #define _CYHAL_DETERMINE_MATCH_BITS(bits) ( (WDT_MAX_IGNORE_BITS) - (bits) ) argument
203 #define _CYHAL_GET_COUNT_FROM_MATCH_BITS(bits) (2UL << _CYHAL_DETERMINE_MATCH_BITS(bits) ) argument
|
| D | cyhal_spi.c | 922 … const cyhal_clock_t *clk, uint8_t bits, cyhal_spi_mode_t mode, bool is_slave) in cyhal_spi_init() argument
933 driver_config.rxDataWidth = bits; in cyhal_spi_init()
934 driver_config.txDataWidth = bits; in cyhal_spi_init()
|
| D | cyhal_clock.c | 3014 uint32_t bits = (clock->block & 0x01) ? 16 : 8; in _cyhal_clock_set_frequency_peripheral() local
3015 cy_rslt_t rslt = _cyhal_clock_compute_div((uint64_t)input_hz, hz, bits, tolerance, &div); in _cyhal_clock_set_frequency_peripheral()
3024 uint32_t bits = (clock->block & 0x01) ? 29 : 21; // Integer bits + 5 in _cyhal_clock_set_frequency_peripheral() local
3025 … cy_rslt_t rslt = _cyhal_clock_compute_div(((uint64_t)input_hz) << 5, hz, bits, tolerance, &div); in _cyhal_clock_set_frequency_peripheral()
|
| /hal_infineon-latest/core-lib/ |
| D | README.md | 14 * `CY_LO8`: Gets the lower 8 bits of a 16-bit value
15 * `CY_HI8`: Gets the upper 8 bits of a 16-bit value
16 * `CY_LO16`: Gets the lower 16 bits of a 32-bit value
17 * `CY_HI16`: Gets the upper 16 bits of a 32-bit value
|
| D | RELEASE.md | 10 * CY_LO8: Gets the lower 8 bits of a 16-bit value
11 * CY_HI8: Gets the upper 8 bits of a 16-bit value
12 * CY_LO16: Gets the lower 16 bits of a 32-bit value
13 * CY_HI16: Gets the upper 16 bits of a 32-bit value
|
| /hal_infineon-latest/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/ |
| D | cy_syslib_ext.s | 67 ; bits are not atomic. Therefore, to avoid a corrupting processor state, it must
68 ; be the policy that all interrupt routines restore the interrupt enable bits as
|
| /hal_infineon-latest/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/ |
| D | startup_cm0plus.s | 96 …; align to 256 byte, because CM0_VECTOR_TABLE_BASE register only supports address bits [31:8] (Not…
170 ; Set CPUSS->RAMx_CTL0.ECC_CHECK_DIS bits to avoid causing unintentional ECC faults during startup …
172 ; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SRAM
|
| /hal_infineon-latest/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_ARM/ |
| D | startup_cm0plus.s | 107 …; Set CPUSS->RAMx_CTL0.ECC_CHECK_DIS bits to avoid causing unintentional ECC faults during startup…
109 …; or if no ECC_CHECK_DIS bits are available in the registers in case of m4cpuss with 32-bit ECC SR…
|
| /hal_infineon-latest/mtb-hal-cat1/include/ |
| D | cyhal_sdio.h | 406 cy_rslt_t cyhal_sdio_dev_mailbox_write(cyhal_sdio_t *obj, uint32_t bits, uint32_t *data);
|
| D | cyhal_spi.h | 255 … const cyhal_clock_t *clk, uint8_t bits, cyhal_spi_mode_t mode, bool is_slave);
|
| /hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/src/include/ |
| D | whd_chip.h | 382 extern whd_result_t whd_reset_core(whd_driver_t whd_driver, device_core_t core_id, uint32_t bits, u…
|
| /hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/src/ |
| D | whd_chip.c | 200 whd_result_t whd_reset_core(whd_driver_t whd_driver, device_core_t core_id, uint32_t bits, uint32_t… in whd_reset_core() argument
219 (bits | resetbits | SICF_FGC | SICF_CLOCK_EN) ); in whd_reset_core()
245 …result = whd_bus_write_backplane_value(whd_driver, base + AI_IOCTRL_OFFSET, (uint8_t)1, (bits | SI… in whd_reset_core()
|
