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Searched refs:XMC_ETH_MAC_WritePhy (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/XMCLib/drivers/src/
Dxmc_eth_phy_dp83848.c193 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_val); in XMC_ETH_PHY_Init()
207 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_RBR, reg_val); in XMC_ETH_PHY_Init()
222 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, BMCR_RESET); in XMC_ETH_PHY_Reset()
245 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_PowerDown()
260 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_ExitPowerDown()
Dxmc_eth_phy_ksz8031rnl.c176 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_Init()
190 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, BMCR_RESET); in XMC_ETH_PHY_Reset()
213 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_PowerDown()
228 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_ExitPowerDown()
Dxmc_eth_phy_ksz8081rnb.c176 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_Init()
190 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, BMCR_RESET); in XMC_ETH_PHY_Reset()
213 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_PowerDown()
228 status = (int32_t)XMC_ETH_MAC_WritePhy(eth_mac, phy_addr, REG_BMCR, reg_bmcr); in XMC_ETH_PHY_ExitPowerDown()
Dxmc_eth_mac.c625 XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_WritePhy(XMC_ETH_MAC_t *eth_mac, uint8_t phy_addr, uint8_t reg_add… in XMC_ETH_MAC_WritePhy() function
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_eth_mac.h546 XMC_ETH_MAC_STATUS_t XMC_ETH_MAC_WritePhy(XMC_ETH_MAC_t *const eth_mac, uint8_t phy_addr, uint8_t r…