Home
last modified time | relevance | path

Searched refs:SRSS_TRIM_RAM_CTL_RA_MASK (Results 1 – 1 of 1) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_syspm_v2.c87 #define SRSS_TRIM_RAM_CTL_RA_MASK ((uint32_t) 0x3U << 8U) macro
2341 …RSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimUlp()
2342 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimUlp()
2359 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimLp()
2360 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimLp()
2378 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimMf()
2379 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimMf()
2396 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimOd()
2397 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimOd()
2414 SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_ULP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetWriteAssistTrimUlp()
[all …]