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Searched refs:SRSS_TRIM_RAM_CTL (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_syspm_v2.c2341 …SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK))… in SetReadMarginTrimUlp()
2342 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimUlp()
2359 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimLp()
2360 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimLp()
2378 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimMf()
2379 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimMf()
2396 … SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimOd()
2397 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimOd()
2414 SRSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_ULP & ((uint32_t) ~SRSS_TRIM_RAM_CTL_RA_MASK)) | in SetWriteAssistTrimUlp()
2415 (SRSS_TRIM_RAM_CTL & SRSS_TRIM_RAM_CTL_RA_MASK); in SetWriteAssistTrimUlp()
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Dcy_syspm_v4.c1894 SRSS_TRIM_RAM_CTL(index) = trimValue; in Cy_SysPm_SetTrimRamCtl()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h924 #define SRSS_TRIM_RAM_CTL (((SRSS_Type*) SRSS)->RAM_TRIM_STRUCT.TRIM_RAM_CTL) macro