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Searched refs:SRSS_SRSS_INTR_CFG (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_lvd.h664 …SRSS_SRSS_INTR_CFG = _CLR_SET_FLD32U(SRSS_SRSS_INTR_CFG, SRSS_SRSS_INTR_CFG_HVLVD1_EDGE_SEL, lvdIn… in Cy_LVD_SetInterruptConfig()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h433 #define SRSS_SRSS_INTR_CFG (((SRSS_Type *) SRSS)->SRSS_AINTR_CFG) macro
531 #define SRSS_SRSS_INTR_CFG (((SRSS_V1_Type *) SRSS)->SRSS_INTR_CFG) macro
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_pra.c128 regIndexToAddr[CY_PRA_INDX_SRSS_SRSS_INTR_CFG].addr = &SRSS_SRSS_INTR_CFG; in Cy_PRA_Init()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h239 #define SRSS_SRSS_INTR_CFG (((SRSS_Type *) SRSS)->SRSS_AINTR_CFG) macro