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Searched refs:SRSS_PWR_REGHC_CTL2 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_syspm_v3.c2197 SRSS_PWR_REGHC_CTL2 &= (uint32_t) ~SRSS_PWR_REGHC_CTL2_REGHC_EN_Msk; in Cy_SysPm_ReghcDisable()
2202 SRSS_PWR_REGHC_CTL2 |= SRSS_PWR_REGHC_CTL2_REGHC_EN_Msk; in Cy_SysPm_ReghcEnable()
2207 SRSS_PWR_REGHC_CTL2 &= (uint32_t) ~SRSS_PWR_REGHC_CTL2_REGHC_PMIC_STATUS_TIMEOUT_Msk; in Cy_SysPm_ReghcDisablePmicStatusTimeout()
2212 CY_REG32_CLR_SET(SRSS_PWR_REGHC_CTL2, SRSS_PWR_REGHC_CTL2_REGHC_PMIC_STATUS_TIMEOUT, timeout); in Cy_SysPm_ReghcEnablePmicStatusTimeout()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h368 #define SRSS_PWR_REGHC_CTL2 (((SRSS_Type *) SRSS)->PWR_REGHC_CTL2) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h184 #define SRSS_PWR_REGHC_CTL2 (((SRSS_Type *) SRSS)->PWR_REGHC_CTL2) macro