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Searched refs:SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_srss.h366 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos 4UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_srss_v3_2.h557 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos 4UL macro
Dcyip_srss_v3_3.h615 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos 4UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_srss.h683 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos 4UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe_remaps.h274 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos SRSS_V2_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos macro
815 #define SRSS_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos SRSS_V3_CLK_OUTPUT_SLOW_SLOW_SEL1_Pos macro