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Searched refs:SRSS_CLK_DPLL_LP_CONFIG3 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysclk_v2.c4724 SRSS_CLK_DPLL_LP_CONFIG3(pllNum) = in Cy_SysClk_DpllLpManualConfigure()
4811 tempReg = SRSS_CLK_DPLL_LP_CONFIG3(pllNum); in Cy_SysClk_DpllLpGetConfiguration()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h918 #define SRSS_CLK_DPLL_LP_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG3) macro