Searched refs:SCB_RX_CTRL (Results 1 – 8 of 8) sorted by relevance
123 CY_REG32_CLR_SET(SCB_RX_CTRL(base), SCB_RX_CTRL_DATA_WIDTH, (dataWidth - 1UL)); in Cy_SCB_UART_SetDataWidth()233 CY_REG32_CLR_SET(SCB_RX_CTRL(base), SCB_RX_CTRL_MSB_FIRST, enableMsbFirst); in Cy_SCB_UART_SetEnableMsbFirst()336 SCB_RX_CTRL(base) = _BOOL2FLD(SCB_RX_CTRL_MSB_FIRST, config->enableMsbFirst) | in Cy_SCB_UART_Init()419 SCB_RX_CTRL(base) = CY_SCB_RX_CTRL_DEF_VAL; in Cy_SCB_UART_DeInit()
112 SCB_RX_CTRL(base) = _BOOL2FLD(SCB_RX_CTRL_MEDIAN, enableDigFilter) | in Cy_SCB_I2C_Init()185 SCB_RX_CTRL(base) = CY_SCB_RX_CTRL_DEF_VAL; in Cy_SCB_I2C_DeInit()560 SCB_RX_CTRL(base) &= (uint32_t) ~SCB_RX_CTRL_MEDIAN_Msk; in Cy_SCB_I2C_SetDataRate()687 SCB_RX_CTRL(base) |= (uint32_t) SCB_RX_CTRL_MEDIAN_Msk; in Cy_SCB_I2C_SetDataRate()693 SCB_RX_CTRL(base) &= (uint32_t) ~SCB_RX_CTRL_MEDIAN_Msk; in Cy_SCB_I2C_SetDataRate()
98 SCB_RX_CTRL(base) = CY_SCB_EZI2C_RX_CTRL; in Cy_SCB_EZI2C_Init()162 SCB_RX_CTRL(base) = CY_SCB_RX_CTRL_DEF_VAL; in Cy_SCB_EZI2C_DeInit()
148 SCB_RX_CTRL(base) = _BOOL2FLD(SCB_RX_CTRL_MSB_FIRST, config->enableMsbFirst) | in Cy_SCB_SPI_Init()228 SCB_RX_CTRL(base) = CY_SCB_RX_CTRL_DEF_VAL; in Cy_SCB_SPI_DeInit()
2013 return (_FLD2VAL(SCB_RX_CTRL_DATA_WIDTH, SCB_RX_CTRL(base)) < CY_SCB_BYTE_WIDTH); in Cy_SCB_IsRxDataWidthByte()2038 return (_FLD2VAL(SCB_RX_CTRL_DATA_WIDTH, SCB_RX_CTRL(base)) + 1UL); in Cy_SCB_Get_RxDataWidth()
1821 #define SCB_RX_CTRL(base) (((CySCB_Type*) (base))->RX_CTRL) macro1867 #define SCB_RX_CTRL(base) (((CySCB_V1_Type*) (base))->RX_CTRL) macro
2248 #define SCB_RX_CTRL(base) (((CySCB_Type*) (base))->RX_CTRL) macro
614 #define SCB_RX_CTRL(base) (((CySCB_Type*) (base))->RX_CTRL) macro
