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Searched refs:SCB_CTRL (Results 1 – 13 of 13) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_scb_common.h1105 SCB_CTRL(base) &= ~SCB_CTRL_MEM_WIDTH_Msk; in Cy_SCB_SetByteMode()
1108 SCB_CTRL(base) |= _VAL2FLD(SCB_CTRL_MEM_WIDTH, CY_SCB_MEM_WIDTH_BYTE); in Cy_SCB_SetByteMode()
1112 SCB_CTRL(base) |= _VAL2FLD(SCB_CTRL_MEM_WIDTH, CY_SCB_MEM_WIDTH_HALFWORD); in Cy_SCB_SetByteMode()
1117 SCB_CTRL(base) |= SCB_CTRL_BYTE_MODE_Msk; in Cy_SCB_SetByteMode()
1121 SCB_CTRL(base) &= ~SCB_CTRL_BYTE_MODE_Msk; in Cy_SCB_SetByteMode()
1151 SCB_CTRL(base) &= ~SCB_CTRL_MEM_WIDTH_Msk; in Cy_SCB_SetMemWidth()
1153 SCB_CTRL(base) |= _VAL2FLD(SCB_CTRL_MEM_WIDTH, MemWidthMode); in Cy_SCB_SetMemWidth()
1988 {return (((uint32_t)(CY_SCB_FIFO_SIZE)) >> _FLD2VAL(SCB_CTRL_MEM_WIDTH, SCB_CTRL(base)));} in Cy_SCB_GetFifoSize()
1990 …{return (_FLD2BOOL(SCB_CTRL_BYTE_MODE, SCB_CTRL(base)) ? (CY_SCB_FIFO_SIZE) : (CY_SCB_FIFO_SIZE / … in Cy_SCB_GetFifoSize()
2099 SCB_CTRL(base) &= (uint32_t) ~SCB_CTRL_ENABLED_Msk; in Cy_SCB_FwBlockReset()
[all …]
Dcy_scb_ezi2c.h555 SCB_CTRL(base) |= SCB_CTRL_ENABLED_Msk; in Cy_SCB_EZI2C_Enable()
578 SCB_CTRL(base) |= SCB_CTRL_EZ_MODE_Msk; in Cy_SCB_SetEzI2CMode()
582 SCB_CTRL(base) &= ~(SCB_CTRL_EZ_MODE_Msk); in Cy_SCB_SetEzI2CMode()
Dcy_scb_uart.h1001 SCB_CTRL(base) |= SCB_CTRL_ENABLED_Msk; in Cy_SCB_UART_Enable()
1194 return (_FLD2VAL(SCB_CTRL_OVS, SCB_CTRL(base))+1UL); in Cy_SCB_UART_GetOverSample()
Dcy_scb_i2c.h1169 SCB_CTRL(base) |= SCB_CTRL_ENABLED_Msk; in Cy_SCB_I2C_Enable()
Dcy_scb_spi.h952 SCB_CTRL(base) |= SCB_CTRL_ENABLED_Msk; in Cy_SCB_SPI_Enable()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_scb_spi.c112 SCB_CTRL(base) =_BOOL2FLD(SCB_CTRL_EC_AM_MODE, config->enableWakeFromSleep) | in Cy_SCB_SPI_Init()
118 SCB_CTRL(base) |=_BOOL2FLD(SCB_CTRL_BYTE_MODE, byteMode); in Cy_SCB_SPI_Init()
221 SCB_CTRL(base) = CY_SCB_CTRL_DEF_VAL; in Cy_SCB_SPI_DeInit()
279 SCB_CTRL(base) &= (uint32_t) ~SCB_CTRL_ENABLED_Msk; in Cy_SCB_SPI_Disable()
382 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback()
422 if (!_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback()
441 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback()
465 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_SPI_DeepSleepCallback()
1162 mem_width = _FLD2VAL(SCB_CTRL_MEM_WIDTH, SCB_CTRL(base)); in HandleReceive()
1250 mem_width = _FLD2VAL(SCB_CTRL_MEM_WIDTH, SCB_CTRL(base)); in HandleTransmit()
Dcy_scb_ezi2c.c90 …SCB_CTRL(base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, (config->numberOfAddresses == CY_SCB_EZI2C_TWO_AD… in Cy_SCB_EZI2C_Init()
93 SCB_CTRL(base) |= SCB_CTRL_BYTE_MODE_Msk; in Cy_SCB_EZI2C_Init()
159 SCB_CTRL(base) = CY_SCB_CTRL_DEF_VAL; in Cy_SCB_EZI2C_DeInit()
205 SCB_CTRL(base) &= (uint32_t) ~SCB_CTRL_ENABLED_Msk; in Cy_SCB_EZI2C_Disable()
275 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback()
313 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback()
339 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback()
365 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_EZI2C_DeepSleepCallback()
Dcy_scb_i2c.c96 SCB_CTRL(base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, config->acceptAddrInFifo) | in Cy_SCB_I2C_Init()
99 SCB_CTRL(base) |= SCB_CTRL_BYTE_MODE_Msk; in Cy_SCB_I2C_Init()
181 SCB_CTRL(base) = CY_SCB_CTRL_DEF_VAL; in Cy_SCB_I2C_DeInit()
228 SCB_CTRL(base) &= (uint32_t) ~SCB_CTRL_ENABLED_Msk; in Cy_SCB_I2C_Disable()
303 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback()
341 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback()
365 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback()
391 if (_FLD2BOOL(SCB_CTRL_EC_AM_MODE, SCB_CTRL(locBase))) in Cy_SCB_I2C_DeepSleepCallback()
2434 if (_FLD2BOOL(SCB_CTRL_ADDR_ACCEPT, SCB_CTRL(base))) in SlaveHandleAddress()
Dcy_scb_uart.c93 CY_REG32_CLR_SET(SCB_CTRL(base), SCB_CTRL_OVS, ovs); in Cy_SCB_UART_SetOverSample()
303 … SCB_CTRL(base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, config->acceptAddrInFifo) | in Cy_SCB_UART_Init()
308 SCB_CTRL(base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, config->acceptAddrInFifo) | in Cy_SCB_UART_Init()
414 SCB_CTRL(base) = CY_SCB_CTRL_DEF_VAL; in Cy_SCB_UART_DeInit()
472 SCB_CTRL(base) &= (uint32_t) ~SCB_CTRL_ENABLED_Msk; in Cy_SCB_UART_Disable()
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_uart.c1022 SCB_CTRL(obj->base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, obj->config.acceptAddrInFifo) | in cyhal_uart_set_baud()
1027 SCB_CTRL(obj->base) = _BOOL2FLD(SCB_CTRL_ADDR_ACCEPT, obj->config.acceptAddrInFifo) | in cyhal_uart_set_baud()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1803 #define SCB_CTRL(base) (((CySCB_Type*) (base))->CTRL) macro
1851 #define SCB_CTRL(base) (((CySCB_V1_Type*) (base))->CTRL) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h2230 #define SCB_CTRL(base) (((CySCB_Type*) (base))->CTRL) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h594 #define SCB_CTRL(base) (((CySCB_Type*) (base))->CTRL) macro