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Searched refs:RAM0_STATUS (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_cpuss_v2.h83 __IM uint32_t RAM0_STATUS; /*!< 0x00001304 RAM 0 status */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_cpuss.h93 __IM uint32_t RAM0_STATUS; /*!< 0x00001304 RAM 0 status */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h519 #define CPUSS_RAM0_STATUS ((((CPUSS_Type *)(CPUSS_BASE))->RAM0_STATUS))