Searched refs:PDM_PCM_CTL (Results 1 – 6 of 6) sorted by relevance
75 PDM_PCM_CTL(base) &= (uint32_t) ~PDM_CTL_ENABLED_Msk; /* Disable the PDM_PCM block */ in Cy_PDM_PCM_Init()84 PDM_PCM_CTL(base) = _VAL2FLD(PDM_CTL_PGA_R, config->gainRight) | in Cy_PDM_PCM_Init()127 PDM_PCM_CTL(base) = CY_PDM_PCM_CTL_DEFAULT; /* Disable the PDM_PCM IP block */ in Cy_PDM_PCM_DeInit()154 CY_REG32_CLR_SET(PDM_PCM_CTL(base), PDM_CTL_PGA_L, ((uint32_t) gain)); in Cy_PDM_PCM_SetGain()158 CY_REG32_CLR_SET(PDM_PCM_CTL(base), PDM_CTL_PGA_R, ((uint32_t) gain)); in Cy_PDM_PCM_SetGain()186 ret = (cy_en_pdm_pcm_gain_t) ((uint32_t)_FLD2VAL(PDM_CTL_PGA_L, PDM_PCM_CTL(base))); in Cy_PDM_PCM_GetGain()190 ret = (cy_en_pdm_pcm_gain_t) ((uint32_t)_FLD2VAL(PDM_CTL_PGA_R, PDM_PCM_CTL(base))); in Cy_PDM_PCM_GetGain()
305 PDM_PCM_CTL(base) = 0UL; /* Disable the PDM_PCM IP block */ in Cy_PDM_PCM_DeInit()
715 PDM_PCM_CTL(base) |= PDM_CTL_SOFT_MUTE_Msk; in Cy_PDM_PCM_EnableSoftMute()730 PDM_PCM_CTL(base) &= (uint32_t) ~PDM_CTL_SOFT_MUTE_Msk; in Cy_PDM_PCM_DisableSoftMute()
651 return ((bool) (PDM_PCM_CTL(base) & (1UL << channel_num))); in Cy_PDM_PCM_Channel_GetCurrentState()
1506 #define PDM_PCM_CTL(base) (((PDM_Type*)(base))->CTL) macro1552 #define PDM_PCM_CTL(base) (((PDM_V1_Type*)(base))->CTL) macro
1998 #define PDM_PCM_CTL(base) (((PDM_Type*)(base))->CTL) macro
