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Searched refs:PDM_PCM_CH_CTL (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_pdm_pcm_v2.c78PDM_PCM_CH_CTL(base, channel_num) = _VAL2FLD(PDM_CH_CTL_WORD_SIZE, channel_config->wordSize) | in Cy_PDM_PCM_Channel_Init()
277PDM_PCM_CH_CTL(base, channel_num) = CY_PDM_PCM_CH_CTL_DEFAULT; /* Channel control default values */ in Cy_PDM_PCM_Channel_DeInit()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_pdm_pcm_v2.h575 PDM_PCM_CH_CTL(base,channel_num) |= PDM_CH_CTL_ENABLED_Msk; in Cy_PDM_PCM_Channel_Enable()
594 PDM_PCM_CH_CTL(base,channel_num) &= (uint32_t) ~PDM_CH_CTL_ENABLED_Msk; in Cy_PDM_PCM_Channel_Disable()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1537 #define PDM_PCM_CH_CTL(base, chnum) (((PDM_Type*)(base))->CH[chnum].CTL) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h2029 #define PDM_PCM_CH_CTL(base, chnum) (((PDM_Type*)(base))->CH[chnum].CTL) macro