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Searched refs:PCLK_TCPWM0_CLOCKS48 (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe1m_config.h112 PCLK_TCPWM0_CLOCKS48 = 0x004Fu, /* tcpwm[0].clocks[48] */ enumerator
Dtviibe2m_config.h122 PCLK_TCPWM0_CLOCKS48 = 0x0059u, /* tcpwm[0].clocks[48] */ enumerator
Dtviibe4m_config.h122 PCLK_TCPWM0_CLOCKS48 = 0x0059u, /* tcpwm[0].clocks[48] */ enumerator
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h125 PCLK_TCPWM0_CLOCKS48 = 0x0156u, /* tcpwm[0].clocks[48] */ enumerator