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Searched refs:PCLK_TCPWM0_CLOCKS19 (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe1m_config.h83 PCLK_TCPWM0_CLOCKS19 = 0x0032u, /* tcpwm[0].clocks[19] */ enumerator
Dtviibe2m_config.h93 PCLK_TCPWM0_CLOCKS19 = 0x003Cu, /* tcpwm[0].clocks[19] */ enumerator
Dtviibe4m_config.h93 PCLK_TCPWM0_CLOCKS19 = 0x003Cu, /* tcpwm[0].clocks[19] */ enumerator
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h96 PCLK_TCPWM0_CLOCKS19 = 0x0139u, /* tcpwm[0].clocks[19] */ enumerator
Dtviic2d6m_config.h54 PCLK_TCPWM0_CLOCKS19 = 0x0015u, /* tcpwm[0].clocks[19] */ enumerator