1 /* 2 * Copyright 2019-2023, Cypress Semiconductor Corporation or 3 * an affiliate of Cypress Semiconductor Corporation. All rights reserved. 4 * 5 * This software, including source code, documentation and related 6 * materials ("Software") is owned by Cypress Semiconductor Corporation 7 * or one of its affiliates ("Cypress") and is protected by and subject to 8 * worldwide patent protection (United States and foreign), 9 * United States copyright laws and international treaty provisions. 10 * Therefore, you may use this Software only as provided in the license 11 * agreement accompanying the software package from which you 12 * obtained this Software ("EULA"). 13 * If no EULA applies, Cypress hereby grants you a personal, non-exclusive, 14 * non-transferable license to copy, modify, and compile the Software 15 * source code solely for use in connection with Cypress's 16 * integrated circuit products. Any reproduction, modification, translation, 17 * compilation, or representation of this Software except as specified 18 * above is prohibited without the express written permission of Cypress. 19 * 20 * Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO WARRANTY OF ANY KIND, 21 * EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress 23 * reserves the right to make changes to the Software without notice. Cypress 24 * does not assume any liability arising out of the application or use of the 25 * Software or any product or circuit described in the Software. Cypress does 26 * not authorize its products for use in any products where a malfunction or 27 * failure of the Cypress product may reasonably be expected to result in 28 * significant property damage, injury or death ("High Risk Product"). By 29 * including Cypress's product in a High Risk Product, the manufacturer 30 * of such system or application assumes all risk of such use and in doing 31 * so agrees to indemnify Cypress against all liability. 32 */ 33 34 /** @file 35 * 36 * Host Controller Interface definitions 37 * 38 */ 39 40 #ifndef HCIDEFS_H 41 #define HCIDEFS_H 42 43 /* 44 ** Definitions for HCI protocol versions 45 */ 46 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 47 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 48 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 49 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 50 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 51 #define HCI_PROTO_VERSION_4_0 0x06 /* Version for BT spec 4.0 [LE] */ 52 #define HCI_PROTO_VERSION_4_1 0x07 /* Version for BT spec 4.1 */ 53 #define HCI_PROTO_VERSION_4_2 0x08 /* Version for BT spec 4.2 */ 54 #define HCI_PROTO_VERSION_5_0 0x09 /* Version for BT spec 5.0 */ 55 #define HCI_PROTO_VERSION_5_1 0x0A /* Version for BT spec 5.1 */ 56 #define HCI_PROTO_VERSION_5_2 0x0B /* Version for BT spec 5.2 */ 57 #define HCI_PROTO_VERSION_5_3 0x0C /* Version for BT spec 5.3 */ 58 59 /* 60 ** Definitions for HCI groups 61 */ 62 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 63 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 64 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 65 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 66 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 67 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 68 69 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 70 71 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 72 #define HCI_OGF(p) (uint8_t)((0xFC00 & (p)) >> 10) 73 #define HCI_OCF(p) ( 0x3FF & (p)) 74 75 /* 76 ** Definitions for Link Control Commands 77 */ 78 /* Following opcode is used only in command complete event for flow control */ 79 #define HCI_COMMAND_NONE 0x0000 80 81 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 82 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0401 */ 83 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0402 */ 84 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0403 */ 85 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0404 */ 86 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0405 */ 87 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0406 */ 88 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0407 */ 89 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0408 */ 90 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0409 */ 91 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040A */ 92 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040B */ 93 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040C */ 94 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040D */ 95 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040E */ 96 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) /* 0x040F */ 97 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0411 */ 98 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0413 */ 99 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0415 */ 100 #define HCI_TEMP_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0417 */ 101 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0419 */ 102 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) /* 0x041A */ 103 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) /* 0x041B */ 104 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) /* 0x041C */ 105 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) /* 0x041D */ 106 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) /* 0x041F */ 107 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0420 */ 108 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0428 */ 109 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0429 */ 110 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042A */ 111 #define HCI_IO_CAPABILITY_REQUEST_REPLY (0x002B | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042B */ 112 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042C */ 113 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042D */ 114 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042E */ 115 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) /* 0x042F */ 116 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0430 */ 117 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0433 */ 118 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0434 */ 119 120 /* AMP HCI */ 121 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0435 */ 122 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0436 */ 123 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0437 */ 124 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0438 */ 125 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0439 */ 126 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043A */ 127 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043B */ 128 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043C */ 129 /* End of AMP HCI */ 130 131 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043D */ 132 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043E */ 133 134 /* ConnectionLess Broadcast */ 135 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) /* 0x043F */ 136 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0440 */ 137 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0441 */ 138 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0442 */ 139 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0443 */ 140 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0444 */ 141 142 /* Secure Connections (SC)*/ 143 #define HCI_REM_OOB_EXT_DATA_REQ_REPLY (0x0045 | HCI_GRP_LINK_CONTROL_CMDS) /* 0x0445 */ 144 145 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 146 #define HCI_LINK_CTRL_CMDS_LAST HCI_REM_OOB_EXT_DATA_REQ_REPLY 147 148 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 149 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0801 */ 150 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0803 */ 151 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0804 */ 152 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0805 */ 153 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0806 */ 154 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0807 */ 155 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0809 */ 156 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) /* 0x080B */ 157 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) /* 0x080C */ 158 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) /* 0x080D */ 159 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) /* 0x080E */ 160 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) /* 0x080F */ 161 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0810 */ 162 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) /* 0x0811 */ 163 164 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 165 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 166 167 168 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 169 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 177 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 188 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 209 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 210 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 211 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 212 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 216 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 217 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 218 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 221 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 222 223 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 224 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 225 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 226 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 228 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 231 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 232 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 233 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 234 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 239 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 240 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 241 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 242 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 243 244 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 245 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 246 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 247 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 248 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 249 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 250 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 251 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 252 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 253 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 254 #define HCI_READ_LE_HOST_SUPPORTED (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 255 #define HCI_WRITE_LE_HOST_SUPPORTED (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 256 257 258 /* MWS coexistence */ 259 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 260 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 261 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 262 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 263 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 264 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 265 266 /* ConnectionLess Broadcast */ 267 #define HCI_SET_RESERVED_LT_ADDR (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 268 #define HCI_DELETE_RESERVED_LT_ADDR (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 269 #define HCI_WRITE_CLB_DATA (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 270 #define HCI_READ_SYNC_TRAIN_PARAM (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 271 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 272 273 /* Secure Connections (SC)*/ 274 #define HCI_READ_SECURE_CONNS_SUPPORT (0x0079 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 275 #define HCI_WRITE_SECURE_CONNS_SUPPORT (0x007A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 276 #define HCI_READ_AUTHENT_PAYLOAD_TOUT (0x007B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 277 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT (0x007C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 278 #define HCI_READ_LOCAL_OOB_EXT_DATA (0x007D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 279 280 281 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 282 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_LOCAL_OOB_EXT_DATA 283 284 285 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 286 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 287 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 288 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 289 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 290 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 291 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 292 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 293 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 294 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 295 296 297 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 298 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 299 300 301 /* Commands of HCI_GRP_STATUS_PARAMS group */ 302 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 303 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 304 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 305 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 306 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 307 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 308 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 309 310 /* AMP HCI */ 311 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 312 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 313 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 314 315 /* MWS coexistence */ 316 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_STATUS_PARAMS) 317 318 /* CSA4 (Trigger Clock) */ 319 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE (0x000D | HCI_GRP_STATUS_PARAMS) 320 321 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 322 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_SET_TRIGGERED_CLOCK_CAPTURE 323 324 /* Commands of HCI_GRP_TESTING_CMDS group */ 325 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 326 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 327 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 328 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 329 330 /* AMP HCI */ 331 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 332 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 333 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 334 335 /* Secure Connections (SC)*/ 336 #define HCI_WRITE_SECURE_CONNS_TEST_MODE (0x000A | HCI_GRP_TESTING_CMDS) 337 338 339 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 340 #define HCI_TESTING_CMDS_LAST HCI_WRITE_SECURE_CONNS_TEST_MODE 341 342 #define HCI_VENDOR_CMDS_FIRST 0x0001 343 #define HCI_VENDOR_CMDS_LAST 0xFFFF 344 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 345 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 346 347 /* BLE HCI */ 348 #define HCI_GRP_BLE_CMDS (0x08 << 10) /* 0x2000*/ 349 /* Commands of BLE Controller setup and configuration */ 350 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) /* 0x2001 */ 351 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) /* 0x2002 */ 352 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) /* 0x2003 */ 353 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) /* 0x2004 */ 354 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) /* 0x2005 */ 355 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) /* 0x2006 */ 356 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) /* 0x2007 */ 357 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) /* 0x2008 */ 358 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) /* 0x2009 */ 359 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) /* 0x200A */ 360 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) /* 0x200B */ 361 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) /* 0x200C */ 362 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) /* 0x200D */ 363 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) /* 0x200E */ 364 #define HCI_BLE_READ_FILTER_ACCEPT_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) /* 0x200F */ 365 #define HCI_BLE_CLEAR_FILTER_ACCEPT_LIST (0x0010 | HCI_GRP_BLE_CMDS) /* 0x2010 */ 366 #define HCI_BLE_ADD_FILTER_ACCEPT_LIST (0x0011 | HCI_GRP_BLE_CMDS) /* 0x2011 */ 367 #define HCI_BLE_REMOVE_FILTER_ACCEPT_LIST (0x0012 | HCI_GRP_BLE_CMDS) /* 0x2012 */ 368 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) /* 0x2013 */ 369 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) /* 0x2014 */ 370 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) /* 0x2015 */ 371 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) /* 0x2016 */ 372 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) /* 0x2017 */ 373 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) /* 0x2018 */ 374 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) /* 0x2019 */ 375 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) /* 0x201A */ 376 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) /* 0x201B */ 377 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) /* 0x201C */ 378 #define HCI_BLE_RECEIVER_TEST (0x001D | HCI_GRP_BLE_CMDS) /* 0x201D */ 379 #define HCI_BLE_TRANSMITTER_TEST (0x001E | HCI_GRP_BLE_CMDS) /* 0x201E */ 380 #define HCI_BLE_TEST_END (0x001F | HCI_GRP_BLE_CMDS) /* 0x201F */ 381 #define HCI_BLE_RC_PARAM_REQ_REPLY (0x0020 | HCI_GRP_BLE_CMDS) /* 0x2020 */ 382 #define HCI_BLE_RC_PARAM_REQ_NEG_REPLY (0x0021 | HCI_GRP_BLE_CMDS) /* 0x2021 */ 383 #define HCI_BLE_SET_DATA_LENGTH (0x0022 | HCI_GRP_BLE_CMDS) /* 0x2022 */ 384 #define HCI_BLE_READ_DFLT_DATA_LENGTH (0x0023 | HCI_GRP_BLE_CMDS) /* 0x2023 */ 385 #define HCI_BLE_WRITE_DFLT_DATA_LENGTH (0x0024 | HCI_GRP_BLE_CMDS) /* 0x2024 */ 386 #define HCI_BLE_ADD_DEV_RESOLVING_LIST (0x0027 | HCI_GRP_BLE_CMDS) /* 0x2027 */ 387 #define HCI_BLE_RM_DEV_RESOLVING_LIST (0x0028 | HCI_GRP_BLE_CMDS) /* 0x2028 */ 388 #define HCI_BLE_CLEAR_RESOLVING_LIST (0x0029 | HCI_GRP_BLE_CMDS) /* 0x2029 */ 389 #define HCI_BLE_READ_RESOLVING_LIST_SIZE (0x002A | HCI_GRP_BLE_CMDS) /* 0x202A */ 390 #define HCI_BLE_READ_RESOLVABLE_ADDR_PEER (0x002B | HCI_GRP_BLE_CMDS) /* 0x202B */ 391 #define HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL (0x002C | HCI_GRP_BLE_CMDS) /* 0x202C */ 392 #define HCI_BLE_SET_ADDR_RESOLUTION_ENABLE (0x002D | HCI_GRP_BLE_CMDS) /* 0x202D */ 393 #define HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT (0x002E | HCI_GRP_BLE_CMDS) /* 0x202E */ 394 395 #define HCI_BLE_READ_PHY (0x0030 | HCI_GRP_BLE_CMDS) /* 0x2030 */ 396 #define HCI_BLE_SET_DEFAULT_PHY (0x0031 | HCI_GRP_BLE_CMDS) /* 0x2031 */ 397 #define HCI_BLE_SET_PHY (0x0032 | HCI_GRP_BLE_CMDS) /* 0x2032 */ 398 399 /* ADV extension */ 400 #define HCI_BLE_SET_ADV_SET_RANDOM_ADDR (0x0035 | HCI_GRP_BLE_CMDS) /* 0x2035 */ 401 #define HCI_BLE_SET_EXT_ADV_PARAMETERS (0x0036 | HCI_GRP_BLE_CMDS) /* 0x2036 */ 402 #define HCI_BLE_SET_EXT_ADV_DATA (0x0037 | HCI_GRP_BLE_CMDS) /* 0x2037 */ 403 #define HCI_BLE_SET_EXT_SCAN_RSP_DATA (0x0038 | HCI_GRP_BLE_CMDS) /* 0x2038 */ 404 #define HCI_BLE_SET_EXT_ADV_ENABLE (0x0039 | HCI_GRP_BLE_CMDS) /* 0x2039 */ 405 #define HCI_BLE_READ_MAX_ADV_DATA_LEN (0x003A | HCI_GRP_BLE_CMDS) /* 0x203A */ 406 #define HCI_BLE_READ_NUM_OF_SUPPORTED_ADV_SETS (0x003B | HCI_GRP_BLE_CMDS) /* 0x203B */ 407 #define HCI_BLE_REMOVE_ADV_SET (0x003C | HCI_GRP_BLE_CMDS) /* 0x203C */ 408 #define HCI_BLE_CLEAR_ADV_SETS (0x003D | HCI_GRP_BLE_CMDS) /* 0x203D */ 409 #define HCI_BLE_SET_PERIODIC_ADV_PARAMS (0x003E | HCI_GRP_BLE_CMDS) /* 0x203E */ 410 #define HCI_BLE_SET_PERIODIC_ADV_DATA (0x003F | HCI_GRP_BLE_CMDS) /* 0x203F */ 411 #define HCI_BLE_SET_PERIODIC_ADV_ENABLE (0x0040 | HCI_GRP_BLE_CMDS) /* 0x2040 */ 412 #define HCI_BLE_SET_EXT_SCAN_PARAMETERS (0x0041 | HCI_GRP_BLE_CMDS) /* 0x2041 */ 413 #define HCI_BLE_SET_EXT_SCAN_ENABLE (0x0042 | HCI_GRP_BLE_CMDS) /* 0x2042 */ 414 #define HCI_BLE_EXT_CREATE_CONNECTION (0x0043 | HCI_GRP_BLE_CMDS) /* 0x2043 */ 415 #define HCI_BLE_PERIODIC_ADV_CREATE_SYNC (0x0044 | HCI_GRP_BLE_CMDS) /* 0x2044 */ 416 417 #define HCI_BLE_PERIODIC_ADV_CREATE_SYNC_CANCEL (0x0045 | HCI_GRP_BLE_CMDS) 418 #define HCI_BLE_PERIODIC_ADV_TERMINATE_SYNC (0x0046 | HCI_GRP_BLE_CMDS) 419 #define HCI_BLE_ADD_DEV_TO_PERIODIC_ADV_LIST (0x0047 | HCI_GRP_BLE_CMDS) 420 #define HCI_BLE_REMOVE_DEV_FROM_PERIODIC_ADV_LIST (0x0048 | HCI_GRP_BLE_CMDS) 421 #define HCI_BLE_CLEAR_PERIODIC_ADV_LIST (0x0049 | HCI_GRP_BLE_CMDS) 422 #define HCI_BLE_READ_PERIODIC_ADV_LIST_SIZE (0x004A | HCI_GRP_BLE_CMDS) 423 424 #define HCI_BLE_SET_PRIVACY_MODE (0x004E | HCI_GRP_BLE_CMDS) 425 426 #define HCI_BLE_SET_PERIODIC_ADV_RCV_ENABLE (0x0059 | HCI_GRP_BLE_CMDS) 427 #define HCI_BLE_PERIODIC_SYNC_XFER (0x005A | HCI_GRP_BLE_CMDS) 428 #define HCI_BLE_PERIODIC_SET_INFO_XFER (0x005B | HCI_GRP_BLE_CMDS) 429 #define HCI_BLE_SET_PERIODIC_SYNC_XFER_PARAMS (0x005C | HCI_GRP_BLE_CMDS) 430 #define HCI_BLE_SET_DETAULT_PERIODIC_SYNC_XFER_PARAMS (0x005D | HCI_GRP_BLE_CMDS) 431 432 #define HCI_BLE_READ_BUFFER_SIZE_V2 (0x0060 | HCI_GRP_BLE_CMDS) 433 434 /* PAWR */ 435 #define HCI_BLE_SET_PAWR_SUBEVENT_IND_DATA (0x0082 | HCI_GRP_BLE_CMDS) 436 #define HCI_BLE_SET_PAWR_SUBEVENT_RSP_DATA (0x0083 | HCI_GRP_BLE_CMDS) 437 #define HCI_BLE_SET_PAWR_SYNC_SUBEVENT (0x0084 | HCI_GRP_BLE_CMDS) 438 #define HCI_BLE_SET_PAWR_PARAMS (0x0086 | HCI_GRP_BLE_CMDS) 439 440 /* LE ISOC */ 441 #define HCI_BLE_ISOC_READ_TX_SYNC (0x0061 | HCI_GRP_BLE_CMDS) 442 #define HCI_BLE_ISOC_SET_CIG_PARAM (0x0062 | HCI_GRP_BLE_CMDS) 443 #define HCI_BLE_ISOC_SET_CIG_PARAM_TEST (0x0063 | HCI_GRP_BLE_CMDS) 444 #define HCI_BLE_ISOC_CREATE_CIS (0x0064 | HCI_GRP_BLE_CMDS) 445 #define HCI_BLE_ISOC_REMOVE_CIG (0x0065 | HCI_GRP_BLE_CMDS) 446 #define HCI_BLE_ISOC_ACCEPT_CIS (0x0066 | HCI_GRP_BLE_CMDS) 447 #define HCI_BLE_ISOC_REJECT_CIS (0x0067 | HCI_GRP_BLE_CMDS) 448 #define HCI_BLE_ISOC_CREATE_BIG (0x0068 | HCI_GRP_BLE_CMDS) 449 #define HCI_BLE_ISOC_CREATE_BIG_TEST (0x0069 | HCI_GRP_BLE_CMDS) 450 #define HCI_BLE_ISOC_TERMINATE_BIG (0x006A | HCI_GRP_BLE_CMDS) 451 #define HCI_BLE_ISOC_TERMINATE_BIG (0x006A | HCI_GRP_BLE_CMDS) 452 #define HCI_BLE_ISOC_BIG_CREATE_SYNC (0x006B | HCI_GRP_BLE_CMDS) 453 #define HCI_BLE_ISOC_BIG_TERMINATE_SYNC (0x006C | HCI_GRP_BLE_CMDS) 454 #define HCI_BLE_ISOC_BIG_TERMINATE_SYNC (0x006C | HCI_GRP_BLE_CMDS) 455 #define HCI_BLE_ISOC_REQUEST_PEER_SCA (0x006D | HCI_GRP_BLE_CMDS) 456 #define HCI_BLE_ISOC_SETUP_DATA_PATH (0x006E | HCI_GRP_BLE_CMDS) 457 #define HCI_BLE_ISOC_REMOVE_DATA_PATH (0x006F | HCI_GRP_BLE_CMDS) 458 #define HCI_BLE_SET_HOST_FEATURE (0x0074 | HCI_GRP_BLE_CMDS) 459 460 461 /* LE supported states definition */ 462 #define HCI_LE_ADV_STATE 0x00000001 463 #define HCI_LE_SCAN_STATE 0x00000002 464 #define HCI_LE_INIT_STATE 0x00000004 465 #define HCI_LE_CONN_SL_STATE 0x00000008 466 #define HCI_LE_ADV_SCAN_STATE 0x00000010 467 #define HCI_LE_ADV_INIT_STATE 0x00000020 468 #define HCI_LE_ADV_MA_STATE 0x00000040 469 #define HCI_LE_ADV_SL_STATE 0x00000080 470 #define HCI_LE_SCAN_INIT_STATE 0x00000100 471 #define HCI_LE_SCAN_MA_STATE 0x00000200 472 #define HCI_LE_SCAN_SL_STATE 0x00000400 473 #define HCI_LE_INIT_MA_STATE 0x00000800 474 475 /* LE Supported States */ 476 /* Non Connectable Adv state is supported. 0x0000000000000001 */ 477 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK 0x01 478 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF 0 479 #define HCI_LE_STATES_NON_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK) 480 481 /*Scanneable Connectable Adv state is supported. 0x0000000000000002 */ 482 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASK 0x02 483 #define HCI_SUPP_LE_STATESSCAN_ADV_OFF 0 484 #define HCI_LE_STATES_SCAN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATESSCAN_ADV_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASK) 485 486 /* Connectable Adv state is supported. 0x0000000000000004 */ 487 #define HCI_SUPP_LE_STATES_CONN_ADV_MASK 0x04 488 #define HCI_SUPP_LE_STATES_CONN_ADV_OFF 0 489 #define HCI_LE_STATES_CONN_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASK) 490 491 /* Hi duty Cycle Directed Adv state is supported. 0x0000000000000008 */ 492 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK 0x08 493 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF 0 494 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK) 495 496 /* Low Duty Cycle Directed Advertising State . 0x0000000020000000 */ 497 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASK 0x20 498 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_OFF 3 499 #define HCI_LE_STATES_LOW_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_MASK) 500 501 /* Passive Scan state is supported. 0x0000000000000010 */ 502 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASK 0x10 503 #define HCI_SUPP_LE_STATES_PASS_SCAN_OFF 0 504 #define HCI_LE_STATES_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASK) 505 506 /* Active Scan state is supported. 0x0000000000000020 */ 507 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK 0x20 508 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF 0 509 #define HCI_LE_STATES_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK) 510 511 /* Initiating state is supported. 0x0000000000000040 (or connection state in master role is also supported) */ 512 #define HCI_SUPP_LE_STATES_INIT_MASK 0x40 513 #define HCI_SUPP_LE_STATES_INIT_OFF 0 514 #define HCI_LE_STATES_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_OFF] & HCI_SUPP_LE_STATES_INIT_MASK) 515 516 /* Connection state in Peripheral role is also supported. 0x0000000000000080 */ 517 #define HCI_SUPP_LE_STATES_PERIPHERAL_MASK 0x80 518 #define HCI_SUPP_LE_STATES_PERIPHERAL_OFF 0 519 #define HCI_LE_STATES_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_PERIPHERAL_MASK) 520 521 /* Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000100 */ 522 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK 0x01 523 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF 1 524 #define HCI_LE_STATES_NON_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK) 525 526 /*Scannable Adv state and Passive Scanning State combination is supported. 0x0000000000000200 */ 527 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK 0x02 528 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF 1 529 #define HCI_LE_STATES_SCAN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK) 530 531 /*Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000400 */ 532 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK 0x04 533 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF 1 534 #define HCI_LE_STATES_CONN_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK) 535 536 /*High Duty Cycl Directed ADv and Passive Scanning State combination is supported. 0x0000000000000800 */ 537 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK 0x08 538 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF 1 539 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF) 540 541 /*Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000001000 */ 542 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK 0x10 543 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF 1 544 #define HCI_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK) 545 546 /*Scannable Adv state and Active Scanning State combination is supported. 0x0000000000002000 */ 547 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK 0x20 548 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF 1 549 #define HCI_LE_STATES_SCAN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK) 550 551 /*Connectable Adv state and Active Scanning State combination is supported. 0x0000000000004000 */ 552 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK 0x40 553 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF 1 554 #define HCI_LE_STATES_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK) 555 556 /*High Duty Cycl Directed ADv and ACtive Scanning State combination is supported. 0x0000000000008000 */ 557 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 558 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 1 559 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF) 560 561 /*Non-Connectable Adv state and Initiating State combination is supported. 0x0000000000010000 */ 562 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK 0x01 563 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF 2 564 #define HCI_LE_STATES_NON_CONN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF] & HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK) 565 566 /* Scannable Adv state and Initiating State combination is supported. 0x0000000000020000 */ 567 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK 0x02 568 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF 2 569 #define HCI_LE_STATES_SCAN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK) 570 571 /* Non-Connectable Adv state and Central Role combination is supported. 0x0000000000040000 */ 572 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_CENTRAL_MASK 0x04 573 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_CENTRAL_OFF 2 574 #define HCI_LE_STATES_NON_CONN_ADV_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_CENTRAL_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_CENTRAL_MASK) 575 576 /*Scannable Adv state and Central Role combination is supported. 0x0000000000040000 */ 577 #define HCI_SUPP_LE_STATES_SCAN_ADV_CENTRAL_MASK 0x08 578 #define HCI_SUPP_LE_STATES_SCAN_ADV_CENTRAL_OFF 2 579 #define HCI_LE_STATES_SCAN_ADV_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_CENTRAL_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_CENTRAL_MASK) 580 581 /* Non-Connectable Adv and Peripheral Role combination is supported. 0x000000000100000 */ 582 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PERIPHERAL_MASK 0x10 583 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PERIPHERAL_OFF 2 584 #define HCI_LE_STATES_NON_CONN_ADV_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PERIPHERAL_MASK) 585 586 /*Scannable Adv and Peripheral Role combination is supported. 0x000000000200000 */ 587 #define HCI_SUPP_LE_STATES_SCAN_ADV_PERIPHERAL_MASK 0x20 588 #define HCI_SUPP_LE_STATES_SCAN_ADV_PERIPHERAL_OFF 2 589 #define HCI_LE_STATES_SCAN_ADV_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PERIPHERAL_MASK) 590 591 /*Passive Scan and Initiating State combination is supported. 0x000000000400000 */ 592 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK 0x40 593 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF 2 594 #define HCI_LE_STATES_PASS_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK) 595 596 /*Active Scan and Initiating State combination is supported. 0x000000000800000 */ 597 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK 0x80 598 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF 2 599 #define HCI_LE_STATES_ACTIVE_SCAN_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK) 600 601 /*Passive Scan and Central Role combination is supported. 0x000000001000000 */ 602 #define HCI_SUPP_LE_STATES_PASS_SCAN_CENTRAL_MASK 0x01 603 #define HCI_SUPP_LE_STATES_PASS_SCAN_CENTRAL_OFF 3 604 #define HCI_LE_STATES_PASS_SCAN_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_CENTRAL_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_CENTRAL_MASK) 605 606 /*Active Scan and Central Role combination is supported. 0x000000002000000 */ 607 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_CENTRAL_MASK 0x02 608 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_CENTRAL_OFF 3 609 #define HCI_LE_STATES_ACTIVE_SCAN_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_CENTRAL_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_CENTRAL_MASK) 610 611 /*Passive Scan and Peripheral Role combination is supported. 0x000000004000000 */ 612 #define HCI_SUPP_LE_STATES_PASS_SCAN_PERIPHERAL_MASK 0x04 613 #define HCI_SUPP_LE_STATES_PASS_SCAN_PERIPHERAL_OFF 3 614 #define HCI_LE_STATES_PASS_SCAN_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_PERIPHERAL_MASK) 615 616 /*Active Scan and Peripheral Role combination is supported. 0x000000008000000 */ 617 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_PERIPHERAL_MASK 0x08 618 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_PERIPHERAL_OFF 3 619 #define HCI_LE_STATES_ACTIVE_SCAN_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_PERIPHERAL_MASK) 620 621 /*Link Layer Topology Added States Combo */ 622 /*Initiating State and Central Role combination supported. 623 Central Role and Central Role combination is also supported. 0x0000000010000000 */ 624 #define HCI_SUPP_LE_STATES_INIT_CENTRAL_MASK 0x10 625 #define HCI_SUPP_LE_STATES_INIT_CENTRAL_OFF 3 626 #define HCI_LE_STATES_INIT_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_CENTRAL_OFF] & HCI_SUPP_LE_STATES_INIT_CENTRAL_MASK) 627 628 /*Low Duty Cycle Directed Advertising State . 0x0000000020000000 */ 629 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASK 0x20 630 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_OFF 3 631 #define HCI_LE_STATES_LOW_DUTY_DIR_ADV_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_MASK) 632 633 /*Low Duty Cycle Directed Advertising State and Passive scan combination. 0x0000000040000000 */ 634 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK 0x40 635 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF 3 636 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK) 637 638 /*Low Duty Cycle Directed Advertising State and Active scan combination . 0x0000000080000000 */ 639 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK 0x80 640 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF 3 641 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK) 642 643 /* Connectable Advertising State and Initiating State combination supported. 0x0000000100000000 */ 644 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK 0x01 645 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF 4 646 #define HCI_LE_STATES_CONN_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK) 647 648 /* High Duty Cycle Directed Advertising State and Initiating State combination supported. */ 649 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK 0x02 650 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF 4 651 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK) 652 653 /* Low Duty Cycle Directed Advertising State and Initiating State combination supported.*/ 654 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK 0x04 655 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF 4 656 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_INIT_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK) 657 658 /* Connectable Advertising State and Central Role combination supported.*/ 659 #define HCI_SUPP_LE_STATES_CONN_ADV_CENTRAL_MASK 0x08 660 #define HCI_SUPP_LE_STATES_CONN_ADV_CENTRAL_OFF 4 661 #define HCI_LE_STATES_CONN_ADV_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_CENTRAL_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_CENTRAL_MASK) 662 663 /* High Duty Cycle Directed Advertising State and Central Role combination supported.*/ 664 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_CENTRAL_MASK 0x10 665 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_CENTRAL_OFF 4 666 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_CENTRAL_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_CENTRAL_MASK) 667 668 /* Low Duty Cycle Directed Advertising State and Central Role combination supported.*/ 669 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_CENTRAL_MASK 0x20 670 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_CENTRAL_OFF 4 671 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_CENTRAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_CENTRAL_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_CENTRAL_MASK) 672 673 /* Connectable Advertising State and Peripheral Role combination supported. */ 674 #define HCI_SUPP_LE_STATES_CONN_ADV_PERIPHERAL_MASK 0x40 675 #define HCI_SUPP_LE_STATES_CONN_ADV_PERIPHERAL_OFF 4 676 #define HCI_LE_STATES_CONN_ADV_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PERIPHERAL_MASK) 677 678 /* High Duty Cycle Directed Advertising State and Peripheral Role combination supported.*/ 679 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PERIPHERAL_MASK 0x80 680 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PERIPHERAL_OFF 4 681 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PERIPHERAL_MASK) 682 683 /* Low Duty Cycle Directed Advertising State and Peripheral Role combination supported.*/ 684 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PERIPHERAL_MASK 0x01 685 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PERIPHERAL_OFF 5 686 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PERIPHERAL_MASK) 687 688 /* Initiating State and Peripheral Role combination supported. 689 Central Role and Peripheral Role combination also supported. 690 */ 691 #define HCI_SUPP_LE_STATES_INIT_CENTRAL_PERIPHERAL_MASK 0x02 692 #define HCI_SUPP_LE_STATES_INIT_CENTRAL_PERIPHERAL_OFF 5 693 #define HCI_LE_STATES_INIT_CENTRAL_PERIPHERAL_SUPPORTED(x) ((x)[HCI_SUPP_LE_STATES_INIT_CENTRAL_PERIPHERAL_OFF] & HCI_SUPP_LE_STATES_INIT_CENTRAL_PERIPHERAL_MASK) 694 695 696 /* 697 ** Definitions for HCI Events 698 */ 699 #define HCI_INQUIRY_COMP_EVT 0x01 700 #define HCI_INQUIRY_RESULT_EVT 0x02 701 #define HCI_CONNECTION_COMP_EVT 0x03 702 #define HCI_CONNECTION_REQUEST_EVT 0x04 703 #define HCI_DISCONNECTION_COMP_EVT 0x05 704 #define HCI_AUTHENTICATION_COMP_EVT 0x06 705 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 706 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 707 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 708 #define HCI_TEMP_LINK_KEY_COMP_EVT 0x0A 709 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 710 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 711 #define HCI_QOS_SETUP_COMP_EVT 0x0D 712 #define HCI_COMMAND_COMPLETE_EVT 0x0E 713 #define HCI_COMMAND_STATUS_EVT 0x0F 714 #define HCI_HARDWARE_ERROR_EVT 0x10 715 #define HCI_FLUSH_OCCURED_EVT 0x11 716 #define HCI_ROLE_CHANGE_EVT 0x12 717 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 718 #define HCI_MODE_CHANGE_EVT 0x14 719 #define HCI_RETURN_LINK_KEYS_EVT 0x15 720 #define HCI_PIN_CODE_REQUEST_EVT 0x16 721 #define HCI_LINK_KEY_REQUEST_EVT 0x17 722 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 723 #define HCI_LOOPBACK_COMMAND_EVT 0x19 724 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 725 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 726 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 727 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 728 #define HCI_QOS_VIOLATION_EVT 0x1E 729 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 730 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 731 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 732 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 733 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 734 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 735 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 736 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 737 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 738 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 739 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 740 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 741 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 742 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 743 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 744 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 745 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 746 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 747 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 748 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 749 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 750 751 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 752 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 753 #define HCI_CHANNEL_SELECTED_EVT 0x41 754 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 755 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 756 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 757 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 758 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 759 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 760 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 761 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 762 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 763 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E 764 765 766 767 /* ULP HCI Event */ 768 #define HCI_BLE_EVENT 0x3e 769 /* ULP Event sub code */ 770 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 771 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 772 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 773 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 774 #define HCI_BLE_LTK_REQ_EVT 0x05 775 #define HCI_BLE_RC_PARAM_REQ_EVT 0x06 776 #define HCI_BLE_DATA_LENGTH_CHANGE_EVT 0x07 777 #define HCI_BLE_ENHANCED_CONN_COMPLETE_EVT 0x0a 778 #define HCI_BLE_DIRECT_ADV_EVT 0x0b 779 #define HCI_BLE_PHY_UPDATE_COMPLETE_EVT 0x0c 780 #define HCI_BLE_EXT_ADV_REPORT_EVT 0x0d 781 #define HCI_BLE_PERIODIC_ADV_SYNC_ESTABLISHED_EVT 0x0e 782 #define HCI_BLE_PERIODIC_ADV_REPORT_EVT 0x0f 783 #define HCI_BLE_PERIODIC_SYNC_LOST_EVT 0x10 784 #define HCI_BLE_EXT_SCAN_TIMEOUT_EVT 0x11 785 #define HCI_BLE_ADV_SET_TERMINATED_EVT 0x12 786 #define HCI_BLE_SCAN_REQ_RECEIVED_EVT 0x13 787 #define HCI_BLE_CHANNEL_SELECTION_ALOGRITHEM_EVT 0x14 788 #define HCI_BLE_PERIODIC_ADV_SYNC_XFER_RECV_EVT 0x18 789 790 #define HCI_BLE_ISOC_CIS_ESTABLISHED_EVT 0x19 791 #define HCI_BLE_ISOC_CIS_REQUEST_EVT 0x1A 792 #define HCI_BLE_ISOC_CREATE_BIG_EVT 0x1B 793 #define HCI_BLE_ISOC_TERMINATE_BIG_EVT 0x1C 794 #define HCI_BLE_ISOC_BIG_SYNC_ESTABLISHED_EVT 0x1D 795 #define HCI_BLE_ISOC_BIG_SYNC_LOST_EVT 0x1E 796 #define HCI_BLE_ISOC_PEER_SCA_COMPLETE_EVT 0x1F 797 #define HCI_BLE_BIGINFO_ADV_REPORT_EVT 0x22 798 799 /* PAWR */ 800 #define HCI_BLE_PAWR_SYNC_ESTABLISHED_EVT 0x24 801 #define HCI_BLE_PAWR_IND_REPORT_EVT 0x25 802 #define HCI_BLE_PAWR_SUBEVENT_DATA_REQ_EVT 0x27 803 #define HCI_BLE_PAWR_RSP_REPORT_EVT 0x28 804 805 /* ConnectionLess Broadcast events */ 806 #define HCI_SYNC_TRAIN_COMP_EVT 0x4F 807 #define HCI_SYNC_TRAIN_RECEIVED_EVT 0x50 808 #define HCI_CLB_RX_DATA_EVT 0x51 809 #define HCI_CLB_RX_TIMEOUT_EVT 0x52 810 #define HCI_TRUNCATED_PAGE_COMP_EVT 0x53 811 #define HCI_PERIPHERAL_PAGE_RESP_TIMEOUT_EVT 0x54 812 #define HCI_CLB_CHANNEL_CHANGE_EVT 0x55 813 #define HCI_INQUIRY_RESPONSE_NOTIF 0x56 814 815 /* Secure Connections events */ 816 #define HCI_AUTHENT_PAYLOAD_TOUT_EVT 0x57 817 818 #define HCI_EVENT_RSP_FIRST HCI_INQUIRY_COMP_EVT 819 #define HCI_EVENT_RSP_LAST HCI_AUTHENT_PAYLOAD_TOUT_EVT 820 821 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 822 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 823 because conflict w/ TCI_EVT and per 824 specification compliant */ 825 826 /* 827 ** Defentions for HCI Error Codes that are past in the events 828 */ 829 #define HCI_SUCCESS 0x00 830 #define HCI_PENDING 0x00 831 #define HCI_ERR_ILLEGAL_COMMAND 0x01 832 #define HCI_ERR_NO_CONNECTION 0x02 833 #define HCI_ERR_HW_FAILURE 0x03 834 #define HCI_ERR_PAGE_TIMEOUT 0x04 835 #define HCI_ERR_AUTH_FAILURE 0x05 836 #define HCI_ERR_KEY_MISSING 0x06 837 #define HCI_ERR_MEMORY_FULL 0x07 838 #define HCI_ERR_CONNECTION_TOUT 0x08 839 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 840 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 841 #define HCI_ERR_CONNECTION_EXISTS 0x0B 842 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 843 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 844 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 845 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 846 #define HCI_ERR_HOST_TIMEOUT 0x10 847 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 848 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 849 #define HCI_ERR_PEER_USER 0x13 850 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 851 #define HCI_ERR_PEER_POWER_OFF 0x15 852 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 853 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 854 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 855 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 856 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 857 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 858 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 859 #define HCI_ERR_SCO_AIR_MODE 0x1D 860 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 861 #define HCI_ERR_UNSPECIFIED 0x1F 862 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 863 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 864 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 865 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 866 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 867 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 868 #define HCI_ERR_UNIT_KEY_USED 0x26 869 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 870 #define HCI_ERR_INSTANT_PASSED 0x28 871 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 872 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 873 #define HCI_ERR_UNDEFINED_0x2B 0x2B 874 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 875 #define HCI_ERR_QOS_REJECTED 0x2D 876 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 877 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 878 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 879 #define HCI_ERR_UNDEFINED_0x31 0x31 880 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 881 #define HCI_ERR_UNDEFINED_0x33 0x33 882 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 883 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 884 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 885 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 886 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 887 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 888 #define HCI_ERR_CONTROLLER_BUSY 0x3A 889 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 890 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 891 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 892 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 893 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 894 895 /* ConnectionLess Broadcast errors */ 896 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 897 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 898 #define HCI_ERR_CLB_NOT_ENABLED 0x42 899 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 900 901 #define HCI_ERR_MAX_ERR 0x43 902 903 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 904 905 /* 906 ** Definitions for HCI enable event 907 */ 908 #define HCI_INQUIRY_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000001) 909 #define HCI_INQUIRY_RESULT_EV(p) (*((uint32_t *)(p)) & 0x00000002) 910 #define HCI_CONNECTION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000004) 911 #define HCI_CONNECTION_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00000008) 912 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000010) 913 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000020) 914 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000040) 915 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((uint32_t *)(p)) & 0x00000080) 916 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((uint32_t *)(p)) & 0x00000100) 917 #define HCI_CENTRAL_LINK_KEY_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00000200) 918 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000400) 919 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((uint32_t *)(p)) & 0x00000800) 920 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00001000) 921 #define HCI_COMMAND_COMPLETE_EV(p) (*((uint32_t *)(p)) & 0x00002000) 922 #define HCI_COMMAND_STATUS_EV(p) (*((uint32_t *)(p)) & 0x00004000) 923 #define HCI_HARDWARE_ERROR_EV(p) (*((uint32_t *)(p)) & 0x00008000) 924 #define HCI_FLASH_OCCURED_EV(p) (*((uint32_t *)(p)) & 0x00010000) 925 #define HCI_ROLE_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x00020000) 926 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((uint32_t *)(p)) & 0x00040000) 927 #define HCI_MODE_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x00080000) 928 #define HCI_RETURN_LINK_KEYS_EV(p) (*((uint32_t *)(p)) & 0x00100000) 929 #define HCI_PIN_CODE_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00200000) 930 #define HCI_LINK_KEY_REQUEST_EV(p) (*((uint32_t *)(p)) & 0x00400000) 931 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((uint32_t *)(p)) & 0x00800000) 932 #define HCI_LOOPBACK_COMMAND_EV(p) (*((uint32_t *)(p)) & 0x01000000) 933 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((uint32_t *)(p)) & 0x02000000) 934 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((uint32_t *)(p)) & 0x04000000) 935 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((uint32_t *)(p)) & 0x08000000) 936 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((uint32_t *)(p)) & 0x10000000) 937 #define HCI_QOS_VIOLATION_EV(p) (*((uint32_t *)(p)) & 0x20000000) 938 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((uint32_t *)(p)) & 0x40000000) 939 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((uint32_t *)(p)) & 0x80000000) 940 941 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 942 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 943 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 944 945 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 946 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 947 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 948 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 949 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 950 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 951 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 952 0x00000800 00000000 Synchronous Connection Complete Event 953 0x00001000 00000000 Synchronous Connection Changed Event 954 0x00002000 00000000 Sniff Subrate Event 955 0x00004000 00000000 Extended Inquiry Result Event 956 0x00008000 00000000 Encryption Key Refresh Complete Event 957 0x00010000 00000000 IO Capability Request Event 958 0x00020000 00000000 IO Capability Response Event 959 0x00040000 00000000 User Confirmation Request Event 960 0x00080000 00000000 User Passkey Request Event 961 0x00100000 00000000 Remote OOB Data Request Event 962 0x00200000 00000000 Simple Pairing Complete Event 963 0x00400000 00000000 Generic AMP Link Key Notification Event 964 0x00800000 00000000 Link Supervision Timeout Changed Event 965 0x01000000 00000000 Enhanced Flush Complete Event 966 0x04000000 00000000 User Passkey Notification Event 967 0x08000000 00000000 Keypress Notification Event 968 0x10000000 00000000 Remote Host Supported Features Notification Event 969 0x20000000 00000000 LE Meta Event 970 */ 971 972 973 /* the event mask for AMP controllers */ 974 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 975 976 /* 0x0000000000000000 No events specified (default) 977 0x0000000000000001 Physical Link Complete Event 978 0x0000000000000002 Channel Selected Event 979 0x0000000000000004 Disconnection Physical Link Event 980 0x0000000000000008 Physical Link Loss Early Warning Event 981 0x0000000000000010 Physical Link Recovery Event 982 0x0000000000000020 Logical Link Complete Event 983 0x0000000000000040 Disconnection Logical Link Complete Event 984 0x0000000000000080 Flow Spec Modify Complete Event 985 0x0000000000000100 Number of Completed Data Blocks Event 986 0x0000000000000200 AMP Start Test Event 987 0x0000000000000400 AMP Test End Event 988 0x0000000000000800 AMP Receiver Report Event 989 0x0000000000001000 Short Range Mode Change Complete Event 990 0x0000000000002000 AMP Status Change Event 991 */ 992 993 /* the event mask page 2 (CLB + CSA4 + SC) for BR/EDR controller */ 994 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\xBF\xC0\x00" 995 /* 0x0000000000004000 Triggered Clock Capture Event 996 0x0000000000008000 Sync Train Complete Event 997 0x0000000000010000 Sync Train Received Event 998 0x0000000000020000 Connectionless Broadcast Receive Event 999 0x0000000000040000 Connectionless Broadcast Timeout Event 1000 0x0000000000080000 Truncated Page Complete Event 1001 0x0000000000100000 Salve Page Response Timeout Event 1002 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 1003 0x0000000000400000 Inquiry Response Notification Event // mask off this event, not processed on host 1004 0x0000000000800000 Authenticated_Payload_Timeout_Expired Event 1005 */ 1006 1007 /* LE Event Mask 1008 Bit LE Subevent Types 1009 0 LE Connection Complete Event 1010 1 LE Advertising Report Event 1011 2 LE Connection Update Complete Event 1012 3 LE Read Remote Features Complete Event 1013 4 LE Long Term Key Request Event 1014 5 LE Remote Connection Parameter Request Event 1015 6 LE Data Length Change Event 1016 7 LE Read Local P-256 Public Key Complete Event 1017 8 LE Generate DHKey Complete Event 1018 9 LE Enhanced Connection Complete Event 1019 10 LE Directed Advertising Report Event 1020 11 LE PHY Update Complete Event 1021 12 LE Extended Advertising Report Event 1022 13 LE Periodic Advertising Sync Established Event 1023 14 LE Periodic Advertising Report Event 1024 15 LE Periodic Advertising Sync Lost Event 1025 16 LE Extended Scan Timeout Event 1026 17 LE Extended Advertising Set Terminated Event 1027 18 LE Scan Request Received Event 1028 19 LE Channel Selection Algorithm Event 1029 20 LE Connectionless IQ Report event 1030 21 LE Connection IQ Report event 1031 22 LE CTE Request Failed event 1032 23 LE Periodic Advertising Sync Transfer Received event 1033 24 LE CIS Established event 1034 25 LE CIS Request event 1035 26 LE Create BIG Complete event 1036 27 LE Terminate BIG Complete event 1037 28 LE BIG Sync Established event 1038 29 LE BIG Sync Lost event 1039 30 LE Request Peer SCA Complete event 1040 31 LE Path Loss Threshold event 1041 32 LE Transmit Power Reporting event 1042 33 LE BIGInfo Advertising Report event 1043 */ 1044 #if BTM_BLE_PRIVACY_SPT == TRUE 1045 /* BLE event mask */ 1046 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\xFA\x7f\x8f\xff\xff" 1047 #else 1048 #define HCI_BLE_EVENT_MASK_DEF "\x00\x00\x00\xFA\x7F\x8f\xff\x7f" 1049 #endif 1050 1051 /* 1052 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 1053 */ 1054 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 1055 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 1056 #define HCI_PKT_TYPES_MASK_DM1 0x0008 1057 #define HCI_PKT_TYPES_MASK_DH1 0x0010 1058 #define HCI_PKT_TYPES_MASK_HV1 0x0020 1059 #define HCI_PKT_TYPES_MASK_HV2 0x0040 1060 #define HCI_PKT_TYPES_MASK_HV3 0x0080 1061 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 1062 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 1063 #define HCI_PKT_TYPES_MASK_DM3 0x0400 1064 #define HCI_PKT_TYPES_MASK_DH3 0x0800 1065 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 1066 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 1067 #define HCI_PKT_TYPES_MASK_DM5 0x4000 1068 #define HCI_PKT_TYPES_MASK_DH5 0x8000 1069 1070 /* Packet type should be one of valid but at least one should be specified */ 1071 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 1072 | HCI_PKT_TYPES_MASK_HV2 \ 1073 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 1074 && ((t) != 0)) 1075 1076 1077 1078 1079 1080 /* Packet type should not be invalid and at least one should be specified */ 1081 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 1082 | HCI_PKT_TYPES_MASK_DH1 \ 1083 | HCI_PKT_TYPES_MASK_DM3 \ 1084 | HCI_PKT_TYPES_MASK_DH3 \ 1085 | HCI_PKT_TYPES_MASK_DM5 \ 1086 | HCI_PKT_TYPES_MASK_DH5 \ 1087 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 1088 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 1089 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 1090 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 1091 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 1092 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 1093 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 1094 | HCI_PKT_TYPES_MASK_DH1 \ 1095 | HCI_PKT_TYPES_MASK_DM3 \ 1096 | HCI_PKT_TYPES_MASK_DH3 \ 1097 | HCI_PKT_TYPES_MASK_DM5 \ 1098 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 1099 1100 /* 1101 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 1102 */ 1103 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 1104 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 1105 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 1106 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 1107 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 1108 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 1109 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 1110 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 1111 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 1112 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 1113 1114 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 1115 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 1116 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 1117 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 1118 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 1119 1120 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 1121 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 1122 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 1123 && ((t) != 0)) 1124 1125 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 1126 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 1127 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 1128 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 1129 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 1130 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 1131 && ((t) != 0)) 1132 1133 /* 1134 ** Define parameters to allow role switch during create connection 1135 */ 1136 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 1137 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 1138 1139 /* 1140 ** Hold Mode command destination 1141 */ 1142 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 1143 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 1144 1145 /* 1146 ** Definitions for different HCI parameters 1147 */ 1148 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 1149 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 1150 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 1151 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 1152 1153 #define HCI_MAX_INQUIRY_LENGTH 0x30 1154 1155 #define HCI_MIN_INQ_LAP 0x9E8B00 1156 #define HCI_MAX_INQ_LAP 0x9E8B3F 1157 1158 1159 /* HCI mode definitions */ 1160 #define HCI_MODE_ACTIVE 0x00 1161 #define HCI_MODE_HOLD 0x01 1162 #define HCI_MODE_SNIFF 0x02 1163 #define HCI_MODE_PARK 0x03 1164 1165 /* HCI Flow Control Mode definitions */ 1166 #define HCI_PACKET_BASED_FC_MODE 0x00 1167 #define HCI_BLOCK_BASED_FC_MODE 0x01 1168 1169 /* Define Packet types as requested by the Host */ 1170 #define HCI_ACL_PKT_TYPE_NONE 0x0000 1171 #define HCI_ACL_PKT_TYPE_DM1 0x0008 1172 #define HCI_ACL_PKT_TYPE_DH1 0x0010 1173 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 1174 #define HCI_ACL_PKT_TYPE_DM3 0x0400 1175 #define HCI_ACL_PKT_TYPE_DH3 0x0800 1176 #define HCI_ACL_PKT_TYPE_DM5 0x4000 1177 #define HCI_ACL_PKT_TYPE_DH5 0x8000 1178 1179 /* Define key type in the Temporary Link Key command */ 1180 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 1181 #define HCI_USE_TEMPORARY_KEY 0x01 1182 1183 /* Page scan period modes */ 1184 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 1185 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 1186 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 1187 1188 /* Define limits for page scan repetition modes */ 1189 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 1190 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 1191 1192 /* Page scan period modes */ 1193 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 1194 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 1195 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 1196 1197 /* Page scan modes */ 1198 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 1199 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 1200 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 1201 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 1202 1203 /* Page and inquiry scan types */ 1204 #define HCI_SCAN_TYPE_STANDARD 0x00 1205 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 1206 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 1207 1208 /* Definitions for quality of service service types */ 1209 #define HCI_SERVICE_NO_TRAFFIC 0x00 1210 #define HCI_SERVICE_BEST_EFFORT 0x01 1211 #define HCI_SERVICE_GUARANTEED 0x02 1212 1213 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1214 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 1215 1216 /* Definitions for Flow Specification */ 1217 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 1218 1219 /* Definitions for AFH Channel Map */ 1220 #define HCI_AFH_CHANNEL_MAP_LEN 10 1221 #define HCI_AFH_CHANNEL_MAX_BIT 78 1222 1223 /* Definitions for Extended Inquiry Response */ 1224 #define HCI_EXT_INQ_RESPONSE_LEN 240 1225 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 1226 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 1227 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 1228 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 1229 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 1230 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 1231 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 1232 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 1233 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 1234 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 1235 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 1236 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 1237 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 1238 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 1239 #define HCI_EIR_OOB_SSP_HASH_C_256_TYPE BT_EIR_OOB_SSP_HASH_C_256_TYPE 1240 #define HCI_EIR_OOB_SSP_RAND_R_256_TYPE BT_EIR_OOB_SSP_RAND_R_256_TYPE 1241 #define HCI_EIR_3D_SYNC_TYPE BT_EIR_3D_SYNC_TYPE 1242 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 1243 1244 /* Definitions for Write Simple Pairing Mode */ 1245 #define HCI_SP_MODE_UNDEFINED 0x00 1246 #define HCI_SP_MODE_ENABLED 0x01 1247 1248 /* Definitions for Write Simple Pairing Debug Mode */ 1249 #define HCI_SPD_MODE_DISABLED 0x00 1250 #define HCI_SPD_MODE_ENABLED 0x01 1251 1252 /* Definitions for Write Secure Connections Host Support */ 1253 #define HCI_SC_MODE_DISABLED 0x00 1254 #define HCI_SC_MODE_ENABLED 0x01 1255 1256 /* Definitions for IO Capability Response/Command */ 1257 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 1258 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 1259 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 1260 #define HCI_IO_CAP_NO_IO 0x03 1261 1262 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 1263 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 1264 1265 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 1266 #define HCI_MITM_PROTECT_REQUIRED 0x01 1267 1268 1269 /* Policy settings status */ 1270 #define HCI_DISABLE_ALL_LM_MODES 0x0000 1271 #define HCI_ENABLE_ROLE_SWITCH 0x0001 1272 #define HCI_ENABLE_HOLD_MODE 0x0002 1273 #define HCI_ENABLE_SNIFF_MODE 0x0004 1274 #define HCI_ENABLE_PARK_MODE 0x0008 1275 1276 /* By default allow switch, because host can not allow that */ 1277 /* that until he created the connection */ 1278 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 1279 1280 /* Filters that are sent in set filter command */ 1281 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 1282 #define HCI_FILTER_INQUIRY_RESULT 0x01 1283 #define HCI_FILTER_CONNECTION_SETUP 0x02 1284 1285 #define HCI_FILTER_COND_NEW_DEVICE 0x00 1286 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 1287 #define HCI_FILTER_COND_BD_ADDR 0x02 1288 1289 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 1290 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 1291 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 1292 1293 /* Auto accept flags */ 1294 #define HCI_AUTO_ACCEPT_OFF 0x00 1295 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 1296 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 1297 1298 /* PIN type */ 1299 #define HCI_PIN_TYPE_VARIABLE 0 1300 #define HCI_PIN_TYPE_FIXED 1 1301 1302 /* Loopback Modes */ 1303 #define HCI_LOOPBACK_MODE_DISABLED 0 1304 #define HCI_LOOPBACK_MODE_LOCAL 1 1305 #define HCI_LOOPBACK_MODE_REMOTE 2 1306 1307 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 1308 1309 /* Maximum connection accept timeout in 0.625msec */ 1310 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 1311 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 1312 1313 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 1314 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 1315 1316 /* Scan enable flags */ 1317 #define HCI_NO_SCAN_ENABLED 0x00 1318 #define HCI_INQUIRY_SCAN_ENABLED 0x01 1319 #define HCI_PAGE_SCAN_ENABLED 0x02 1320 1321 /* Pagescan timer definitions in 0.625 ms */ 1322 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 1323 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 1324 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 1325 1326 /* Parameter for pagescan window is passed to LC and is kept in slots */ 1327 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 1328 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 1329 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 1330 1331 /* Inquiryscan timer definitions in 0.625 ms */ 1332 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 1333 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1334 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 1335 1336 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 1337 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 1338 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 1339 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 1340 1341 /* Encryption modes */ 1342 #define HCI_ENCRYPT_MODE_DISABLED 0x00 1343 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 1344 #define HCI_ENCRYPT_MODE_ALL 0x02 1345 1346 /* Voice settings */ 1347 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 1348 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 1349 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 1350 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 1351 1352 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 1353 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 1354 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 1355 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 1356 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 1357 1358 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 1359 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 1360 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 1361 1362 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 1363 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 1364 1365 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 1366 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 1367 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 1368 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 1369 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 1370 1371 /* default 0001100000 */ 1372 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 1373 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 1374 | HCI_INP_SAMPLE_SIZE_16BIT \ 1375 | HCI_AIR_CODING_FORMAT_CVSD) 1376 1377 #define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 1378 #define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 1379 #define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 1380 #define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 1381 1382 /* Coding Formats (BT 4.1 or later Assigned numbers) */ 1383 #define HCI_CODING_FORMAT_ULAW ((uint8_t) 0x00) /* u-Law log */ 1384 #define HCI_CODING_FORMAT_ALAW ((uint8_t) 0x01) /* A-Law log */ 1385 #define HCI_CODING_FORMAT_CVSD ((uint8_t) 0x02) /* CVSD */ 1386 #define HCI_CODING_FORMAT_TRANSPNT ((uint8_t) 0x03) /* Transparent */ 1387 #define HCI_CODING_FORMAT_LINEAR ((uint8_t) 0x04) /* Linear PCM */ 1388 #define HCI_CODING_FORMAT_MSBC ((uint8_t) 0x05) /* MSBC PCM */ 1389 #define HCI_CODING_FORMAT_VS ((uint8_t) 0xFF) /* Specifies VSC used */ 1390 1391 /* PCM Data Formats (BT 4.1 or later Assigned numbers) */ 1392 #define HCI_PCM_DATA_FORMAT_NA ((uint8_t) 0x00) /* N/A to coding format in use */ 1393 #define HCI_PCM_DATA_FORMAT_1_COMP ((uint8_t) 0x01) /* 1's complement */ 1394 #define HCI_PCM_DATA_FORMAT_2_COMP ((uint8_t) 0x02) /* 2's complement */ 1395 #define HCI_PCM_DATA_FORMAT_SIGN ((uint8_t) 0x03) /* Sign-magnitude */ 1396 #define HCI_PCM_DATA_FORMAT_UNSIGN ((uint8_t) 0x04) /* Unsigned */ 1397 1398 /* Data Path (BT 4.1 or later Assigned numbers) */ 1399 #define HCI_DATA_PATH_HCI ((uint8_t) 0x00) /* HCI-0, 0x01-0xFE (PCM Chan) */ 1400 #define HCI_DATA_PATH_TEST ((uint8_t) 0xFF) /* 0xFF-Audio Test */ 1401 1402 /* Retransmit timer definitions in 0.625 */ 1403 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 1404 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 1405 1406 /* Broadcast retransmitions */ 1407 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 1408 1409 /* Define broadcast data types as passed in the hci data packet */ 1410 #define HCI_DATA_POINT_TO_POINT 0x00 1411 #define HCI_DATA_ACTIVE_BCAST 0x01 1412 #define HCI_DATA_PICONET_BCAST 0x02 1413 1414 /* Hold mode activity */ 1415 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 1416 #define HCI_SUSPEND_PAGE_SCAN 0x01 1417 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 1418 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 1419 1420 /* Default Link Supervision timeoout */ 1421 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 1422 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 1423 1424 /* Read transmit power level parameter */ 1425 #define HCI_READ_CURRENT 0x00 1426 #define HCI_READ_MAXIMUM 0x01 1427 1428 /* Link types for connection complete event */ 1429 #define HCI_LINK_TYPE_SCO 0x00 1430 #define HCI_LINK_TYPE_ACL 0x01 1431 #define HCI_LINK_TYPE_ESCO 0x02 1432 1433 /* Link Key Notification Event (Key Type) definitions */ 1434 #define HCI_LKEY_TYPE_COMBINATION 0x00 1435 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 1436 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 1437 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 1438 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 1439 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 1440 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 1441 #define HCI_LKEY_TYPE_UNAUTH_COMB_P_256 0x07 1442 #define HCI_LKEY_TYPE_AUTH_COMB_P_256 0x08 1443 1444 /* Internal definitions - not used over HCI */ 1445 #define HCI_LKEY_TYPE_UNKNOWN 0xff 1446 1447 /* Read Local Version HCI Version return values (Command Complete Event) */ 1448 #define HCI_VERSION_1_0B 0x00 1449 #define HCI_VERSION_1_1 0x01 1450 1451 /* Define an invalid value for a handle */ 1452 #define HCI_INVALID_HANDLE 0xFFFF 1453 1454 /* Define max ammount of data in the HCI command */ 1455 #define HCI_COMMAND_SIZE 255 1456 1457 /* Define the preamble length for all HCI Commands. 1458 ** This is 2-bytes for opcode and 1 byte for length 1459 */ 1460 #define HCIC_PREAMBLE_SIZE 3 1461 1462 /* Define the preamble length for all HCI Events 1463 ** This is 1-byte for opcode and 1 byte for length 1464 */ 1465 #define HCIE_PREAMBLE_SIZE 2 1466 #define HCI_SCO_PREAMBLE_SIZE 3 1467 #define HCI_DATA_PREAMBLE_SIZE 4 1468 1469 /* ConnectionLess Broadcast */ 1470 #define HCI_CLB_DISABLE 0x00 1471 #define HCI_CLB_ENABLE 0x01 1472 1473 /* ConnectionLess Broadcast Data fragment */ 1474 #define HCI_CLB_FRAGMENT_CONT 0x00 1475 #define HCI_CLB_FRAGMENT_START 0x01 1476 #define HCI_CLB_FRAGMENT_END 0x02 1477 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1478 1479 /* AMP Controller Status codes 1480 */ 1481 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1482 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1483 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1484 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1485 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1486 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1487 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1488 1489 #define HCI_MAX_AMP_STATUS_TYPES 7 1490 1491 /* array sizes for MWS coexistence commands */ 1492 #define HCI_MWS_NUM_PERIODS_SUPPORTED 32 /* used for HCI_SET_EXTERNAL_FRAME_CONFIGURATION */ 1493 #define HCI_MWS_NUM_SCAN_FREQS_SUPPORTED 8 /* used for HCI_SET_MWS_SCAN_FREQUENCY_TABLE */ 1494 #define HCI_MWS_PATTERNS_NUM_INTERVS_SUPPORTED 16 /* used for HCI_SET_MWS_PATTERN_CONFIGURATION */ 1495 #define HCI_MWS_NUM_TRANSPS_SUPPORTED 10 /* used for HCI_GET_MWS_TRANS_LAYER_CFG */ 1496 #define HCI_MWS_NUM_BAUD_RATES_ON_ONE_TRANSP_SUPPORTED 20 /* used for HCI_GET_MWS_TRANS_LAYER_CFG */ 1497 1498 /** Define the extended flow specification fields used by AMP */ 1499 typedef struct 1500 { 1501 uint8_t id; /**< Unique Identifier */ 1502 uint8_t stype; /**< Service Type */ 1503 uint16_t max_sdu_size; /**< Maximum SDU size */ 1504 uint32_t sdu_inter_time; /**< SDU Inter-arrival Time */ 1505 uint32_t access_latency; /**< Access Latency (in microseconds) */ 1506 uint32_t flush_timeout; /**< Flush Timeout (in microseconds) */ 1507 } tHCI_EXT_FLOW_SPEC; 1508 1509 1510 /* HCI message type definitions (for H4 messages) */ 1511 #define HCIT_TYPE_COMMAND 1 1512 #define HCIT_TYPE_ACL_DATA 2 1513 #define HCIT_TYPE_SCO_DATA 3 1514 #define HCIT_TYPE_EVENT 4 1515 #define HCIT_TYPE_LM_DIAG 7 1516 #define HCIT_TYPE_NFC 16 1517 1518 #define HCIT_LM_DIAG_LENGTH 63 1519 1520 /* Define values for LMP Test Control parameters 1521 ** Test Scenario, Hopping Mode, Power Control Mode 1522 */ 1523 #define LMP_TESTCTL_TESTSC_PAUSE 0 1524 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1525 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1526 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1527 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1528 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1529 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1530 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1531 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1532 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1533 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1534 1535 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1536 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1537 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1538 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1539 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1540 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1541 1542 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1543 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1544 1545 1546 /* 1547 ** Define company IDs (from Bluetooth Assigned Numbers v1.1, section 2.2) 1548 */ 1549 #define LMP_COMPID_ERICSSON 0 1550 #define LMP_COMPID_NOKIA 1 1551 #define LMP_COMPID_INTEL 2 1552 #define LMP_COMPID_IBM 3 1553 #define LMP_COMPID_TOSHIBA 4 1554 #define LMP_COMPID_3COM 5 1555 #define LMP_COMPID_MICROSOFT 6 1556 #define LMP_COMPID_LUCENT 7 1557 #define LMP_COMPID_MOTOROLA 8 1558 #define LMP_COMPID_INFINEON 9 1559 #define LMP_COMPID_CSR 10 1560 #define LMP_COMPID_SILICON_WAVE 11 1561 #define LMP_COMPID_DIGIANSWER 12 1562 #define LMP_COMPID_TEXAS_INSTRUMENTS 13 1563 #define LMP_COMPID_PARTHUS 14 1564 #define LMP_COMPID_BROADCOM 15 1565 #define LMP_COMPID_MITEL_SEMI 16 1566 #define LMP_COMPID_WIDCOMM 17 1567 #define LMP_COMPID_ZEEVO 18 1568 #define LMP_COMPID_ATMEL 19 1569 #define LMP_COMPID_MITSUBISHI 20 1570 #define LMP_COMPID_RTX_TELECOM 21 1571 #define LMP_COMPID_KC_TECH 22 1572 #define LMP_COMPID_NEWLOGIC 23 1573 #define LMP_COMPID_TRANSILICA 24 1574 #define LMP_COMPID_ROHDE_SCHWARZ 25 1575 #define LMP_COMPID_TTPCOM 26 1576 #define LMP_COMPID_SIGNIA 27 1577 #define LMP_COMPID_CONEXANT 28 1578 #define LMP_COMPID_QUALCOMM 29 1579 #define LMP_COMPID_INVENTEL 30 1580 #define LMP_COMPID_AVM 31 1581 #define LMP_COMPID_BANDSPEED 32 1582 #define LMP_COMPID_MANSELLA 33 1583 #define LMP_COMPID_NEC_CORP 34 1584 #define LMP_COMPID_WAVEPLUS 35 1585 #define LMP_COMPID_ALCATEL 36 1586 #define LMP_COMPID_PHILIPS 37 1587 #define LMP_COMPID_C_TECHNOLOGIES 38 1588 #define LMP_COMPID_OPEN_INTERFACE 39 1589 #define LMP_COMPID_RF_MICRO 40 1590 #define LMP_COMPID_HITACHI 41 1591 #define LMP_COMPID_SYMBOL_TECH 42 1592 #define LMP_COMPID_TENOVIS 43 1593 #define LMP_COMPID_MACRONIX 44 1594 #define LMP_COMPID_GCT_SEMI 45 1595 #define LMP_COMPID_NORWOOD_SYSTEMS 46 1596 #define LMP_COMPID_MEWTEL_TECH 47 1597 #define LMP_COMPID_STM 48 1598 #define LMP_COMPID_SYNOPSYS 49 1599 #define LMP_COMPID_RED_M_LTD 50 1600 #define LMP_COMPID_COMMIL_LTD 51 1601 #define LMP_COMPID_CATC 52 1602 #define LMP_COMPID_ECLIPSE 53 1603 #define LMP_COMPID_RENESAS_TECH 54 1604 #define LMP_COMPID_MOBILIAN_CORP 55 1605 #define LMP_COMPID_TERAX 56 1606 #define LMP_COMPID_ISSC 57 1607 #define LMP_COMPID_MATSUSHITA 58 1608 #define LMP_COMPID_GENNUM_CORP 59 1609 #define LMP_COMPID_RESEARCH_IN_MOTION 60 1610 #define LMP_COMPID_IPEXTREME 61 1611 #define LMP_COMPID_SYSTEMS_AND_CHIPS 62 1612 #define LMP_COMPID_BLUETOOTH_SIG 63 1613 #define LMP_COMPID_SEIKO_EPSON_CORP 64 1614 #define LMP_COMPID_ISS_TAIWAN 65 1615 #define LMP_COMPID_CONWISE_TECHNOLOGIES 66 1616 #define LMP_COMPID_PARROT_SA 67 1617 #define LMP_COMPID_SOCKET_COMM 68 1618 #define LMP_COMPID_ALTHEROS 69 1619 #define LMP_COMPID_MEDIATEK 70 1620 #define LMP_COMPID_BLUEGIGA 71 1621 #define LMP_COMPID_MARVELL 72 1622 #define LMP_COMPID_3DSP_CORP 73 1623 #define LMP_COMPID_ACCEL_SEMICONDUCTOR 74 1624 #define LMP_COMPID_CONTINENTAL_AUTO 75 1625 #define LMP_COMPID_APPLE 76 1626 #define LMP_COMPID_STACCATO 77 1627 #define LMP_COMPID_AVAGO_TECHNOLOGIES 78 1628 #define LMP_COMPID_APT_LTD 79 1629 #define LMP_COMPID_SIRF_TECHNOLOGY 80 1630 #define LMP_COMPID_TZERO_TECHNOLOGY 81 1631 #define LMP_COMPID_J_AND_M_CORP 82 1632 #define LMP_COMPID_FREE_2_MOVE 83 1633 #define LMP_COMPID_3DIJOY_CORP 84 1634 #define LMP_COMPID_PLANTRONICS 85 1635 #define LMP_COMPID_SONY_ERICSSON_MOBILE 86 1636 #define LMP_COMPID_HARMON_INTL_IND 87 1637 #define LMP_COMPID_VIZIO 88 1638 #define LMP_COMPID_NORDIC SEMI 89 1639 #define LMP_COMPID_EM_MICRO 90 1640 #define LMP_COMPID_RALINK_TECH 91 1641 #define LMP_COMPID_BELKIN_INC 92 1642 #define LMP_COMPID_REALTEK_SEMI 93 1643 #define LMP_COMPID_STONESTREET_ONE 94 1644 #define LMP_COMPID_WICENTRIC 95 1645 #define LMP_COMPID_RIVIERAWAVES 96 1646 #define LMP_COMPID_RDA_MICRO 97 1647 #define LMP_COMPID_GIBSON_GUITARS 98 1648 #define LMP_COMPID_MICOMMAND_INC 99 1649 #define LMP_COMPID_BAND_XI 100 1650 #define LMP_COMPID_HP_COMPANY 101 1651 #define LMP_COMPID_9SOLUTIONS_OY 102 1652 #define LMP_COMPID_GN_NETCOM 103 1653 #define LMP_COMPID_GENERAL_MOTORS 104 1654 #define LMP_COMPID_AD_ENGINEERING 105 1655 #define LMP_COMPID_MINDTREE_LTD 106 1656 #define LMP_COMPID_POLAR_ELECTRO 107 1657 #define LMP_COMPID_BEAUTIFUL_ENTERPRISE 108 1658 #define LMP_COMPID_BRIARTEK 109 1659 #define LMP_COMPID_SUMMIT_DATA_COMM 110 1660 #define LMP_COMPID_SOUND_ID 111 1661 #define LMP_COMPID_MONSTER LLC 112 1662 #define LMP_COMPID_CONNECTBLU 113 1663 1664 #define LMP_COMPID_SHANGHAI_SSE 114 1665 #define LMP_COMPID_GROUP_SENSE 115 1666 #define LMP_COMPID_ZOMM 116 1667 #define LMP_COMPID_SAMSUNG 117 1668 #define LMP_COMPID_CREATIVE_TECH 118 1669 #define LMP_COMPID_LAIRD_TECH 119 1670 #define LMP_COMPID_NIKE 120 1671 #define LMP_COMPID_LESSWIRE 121 1672 #define LMP_COMPID_MSTAR_SEMI 122 1673 #define LMP_COMPID_HANLYNN_TECH 123 1674 #define LMP_COMPID_AR_CAMBRIDGE 124 1675 #define LMP_COMPID_SEERS_TECH 125 1676 #define LMP_COMPID_SPORTS_TRACKING 126 1677 #define LMP_COMPID_AUTONET_MOBILE 127 1678 #define LMP_COMPID_DELORME_PUBLISH 128 1679 #define LMP_COMPID_WUXI_VIMICRO 129 1680 #define LMP_COMPID_SENNHEISER 130 1681 #define LMP_COMPID_TIME_KEEPING_SYS 131 1682 #define LMP_COMPID_LUDUS_HELSINKI 132 1683 #define LMP_COMPID_BLUE_RADIOS 133 1684 #define LMP_COMPID_EQUINUX 134 1685 #define LMP_COMPID_GARMIN_INTL 135 1686 #define LMP_COMPID_ECOTEST 136 1687 #define LMP_COMPID_GN_RESOUND 137 1688 #define LMP_COMPID_JAWBONE 138 1689 #define LMP_COMPID_TOPCON_POSITIONING 139 1690 #define LMP_COMPID_QUALCOMM_LABS 140 1691 #define LMP_COMPID_ZSCAN_SOFTWARE 141 1692 #define LMP_COMPID_QUINTIC 142 1693 #define LMP_COMPID_STOLLMAN_EV 143 1694 #define LMP_COMPID_FUNAI_ELECTRONIC 144 1695 #define LMP_COMPID_ADV_PANMOBILE 145 1696 #define LMP_COMPID_THINK_OPTICS 146 1697 #define LMP_COMPID_UNIVERSAL_ELEC 147 1698 #define LMP_COMPID_AIROHA_TECH 148 1699 #define LMP_COMPID_CYPRESS 305 1700 #define LMP_COMPID_MAX_ID 443 /* this is a place holder */ 1701 #define LMP_COMPID_INTERNAL 65535 1702 1703 #define MAX_LMP_COMPID (LMP_COMPID_MAX_ID) 1704 /* 1705 ** Define the packet types in the packet header, and a couple extra 1706 */ 1707 #define PKT_TYPE_NULL 0x00 1708 #define PKT_TYPE_POLL 0x01 1709 #define PKT_TYPE_FHS 0x02 1710 #define PKT_TYPE_DM1 0x03 1711 1712 #define PKT_TYPE_DH1 0x04 1713 #define PKT_TYPE_HV1 0x05 1714 #define PKT_TYPE_HV2 0x06 1715 #define PKT_TYPE_HV3 0x07 1716 #define PKT_TYPE_DV 0x08 1717 #define PKT_TYPE_AUX1 0x09 1718 1719 #define PKT_TYPE_DM3 0x0a 1720 #define PKT_TYPE_DH3 0x0b 1721 1722 #define PKT_TYPE_DM5 0x0e 1723 #define PKT_TYPE_DH5 0x0f 1724 1725 1726 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1727 #define PKT_TYPE_BAD 0x11 1728 #define PKT_TYPE_NONE 0x12 1729 1730 /* 1731 ** Define packet size 1732 */ 1733 #define HCI_DM1_PACKET_SIZE 17 1734 #define HCI_DH1_PACKET_SIZE 27 1735 #define HCI_DM3_PACKET_SIZE 121 1736 #define HCI_DH3_PACKET_SIZE 183 1737 #define HCI_DM5_PACKET_SIZE 224 1738 #define HCI_DH5_PACKET_SIZE 339 1739 #define HCI_AUX1_PACKET_SIZE 29 1740 #define HCI_HV1_PACKET_SIZE 10 1741 #define HCI_HV2_PACKET_SIZE 20 1742 #define HCI_HV3_PACKET_SIZE 30 1743 #define HCI_DV_PACKET_SIZE 9 1744 #define HCI_EDR2_DH1_PACKET_SIZE 54 1745 #define HCI_EDR2_DH3_PACKET_SIZE 367 1746 #define HCI_EDR2_DH5_PACKET_SIZE 679 1747 #define HCI_EDR3_DH1_PACKET_SIZE 83 1748 #define HCI_EDR3_DH3_PACKET_SIZE 552 1749 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1750 1751 /* Feature Pages */ 1752 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1753 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1754 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1755 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1756 1757 #define HCI_FEATURE_BYTES_PER_PAGE 8 1758 1759 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1760 1761 /* 1762 ** LMP features encoding - page 0 1763 */ 1764 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1765 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1766 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1767 1768 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1769 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1770 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1771 1772 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1773 #define HCI_FEATURE_ENCRYPTION_OFF 0 1774 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1775 1776 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1777 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1778 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1779 1780 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1781 #define HCI_FEATURE_TIMING_ACC_OFF 0 1782 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1783 1784 #define HCI_FEATURE_SWITCH_MASK 0x20 1785 #define HCI_FEATURE_SWITCH_OFF 0 1786 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1787 1788 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1789 #define HCI_FEATURE_HOLD_MODE_OFF 0 1790 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1791 1792 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1793 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1794 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1795 1796 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1797 #define HCI_FEATURE_PARK_MODE_OFF 1 1798 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1799 1800 #define HCI_FEATURE_RSSI_MASK 0x02 1801 #define HCI_FEATURE_RSSI_OFF 1 1802 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1803 1804 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1805 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1806 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1807 1808 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1809 #define HCI_FEATURE_SCO_LINK_OFF 1 1810 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1811 1812 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1813 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1814 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1815 1816 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1817 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1818 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1819 1820 #define HCI_FEATURE_U_LAW_MASK 0x40 1821 #define HCI_FEATURE_U_LAW_OFF 1 1822 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1823 1824 #define HCI_FEATURE_A_LAW_MASK 0x80 1825 #define HCI_FEATURE_A_LAW_OFF 1 1826 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1827 1828 #define HCI_FEATURE_CVSD_MASK 0x01 1829 #define HCI_FEATURE_CVSD_OFF 2 1830 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1831 1832 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1833 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1834 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1835 1836 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1837 #define HCI_FEATURE_POWER_CTRL_OFF 2 1838 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1839 1840 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1841 #define HCI_FEATURE_TRANSPNT_OFF 2 1842 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1843 1844 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1845 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1846 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1847 1848 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1849 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1850 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1851 1852 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1853 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1854 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1855 1856 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1857 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1858 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1859 1860 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1861 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1862 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1863 1864 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1865 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1866 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1867 1868 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1869 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1870 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1871 1872 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1873 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1874 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1875 1876 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1877 #define HCI_FEATURE_INQ_RSSI_OFF 3 1878 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1879 1880 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1881 #define HCI_FEATURE_ESCO_EV3_OFF 3 1882 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1883 1884 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1885 #define HCI_FEATURE_ESCO_EV4_OFF 4 1886 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1887 1888 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1889 #define HCI_FEATURE_ESCO_EV5_OFF 4 1890 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1891 1892 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1893 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1894 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1895 1896 #define HCI_FEATURE_AFH_CAP_PERIPHERAL_MASK 0x08 1897 #define HCI_FEATURE_AFH_CAP_PERIPHERAL_OFF 4 1898 #define HCI_LMP_AFH_CAP_PERIPHERAL_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_PERIPHERAL_OFF] & HCI_FEATURE_AFH_CAP_PERIPHERAL_MASK) 1899 1900 #define HCI_FEATURE_AFH_CLASS_PERIPHERAL_MASK 0x10 1901 #define HCI_FEATURE_AFH_CLASS_PERIPHERAL_OFF 4 1902 #define HCI_LMP_AFH_CLASS_PERIPHERAL_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_PERIPHERAL_OFF] & HCI_FEATURE_AFH_CLASS_PERIPHERAL_MASK) 1903 1904 #if 1 1905 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1906 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1907 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1908 1909 #define HCI_FEATURE_LE_SPT_MASK 0x40 1910 #define HCI_FEATURE_LE_SPT_OFF 4 1911 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1912 #else 1913 1914 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1915 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1916 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1917 1918 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1919 #define HCI_FEATURE_ANON_MODE_OFF 4 1920 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1921 #endif 1922 1923 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1924 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1925 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1926 1927 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1928 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1929 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1930 1931 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1932 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1933 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1934 1935 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1936 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1937 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1938 1939 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1940 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1941 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1942 1943 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1944 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1945 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1946 1947 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1948 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1949 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1950 1951 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1952 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1953 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1954 1955 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1956 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1957 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1958 1959 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1960 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1961 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1962 1963 #if 1 /* TOKYO spec definition */ 1964 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1965 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1966 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1967 1968 #else 1969 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1970 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1971 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1972 #endif 1973 1974 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1975 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1976 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1977 1978 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1979 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1980 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1981 1982 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1983 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1984 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1985 1986 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1987 #define HCI_FEATURE_ERROR_DATA_OFF 6 1988 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1989 1990 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1991 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1992 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) ((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1993 1994 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1995 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1996 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1997 1998 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1999 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 2000 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 2001 2002 #define HCI_FEATURE_EXTENDED_MASK 0x80 2003 #define HCI_FEATURE_EXTENDED_OFF 7 2004 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 2005 2006 /* 2007 ** LMP features encoding - page 1 2008 */ 2009 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 2010 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 2011 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 2012 2013 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 2014 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 2015 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 2016 2017 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 2018 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 2019 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 2020 2021 #define HCI_EXT_FEATURE_SC_HOST_MASK 0x08 2022 #define HCI_EXT_FEATURE_SC_HOST_OFF 0 2023 #define HCI_SC_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_HOST_OFF] & HCI_EXT_FEATURE_SC_HOST_MASK) 2024 2025 /* 2026 ** LMP features encoding - page 2 2027 */ 2028 #define HCI_EXT_FEATURE_CSB_CENTRAL_MASK 0x01 2029 #define HCI_EXT_FEATURE_CSB_CENTRAL_OFF 0 2030 #define HCI_CSB_CENTRAL_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_CENTRAL_OFF] & HCI_EXT_FEATURE_CSB_CENTRAL_MASK) 2031 2032 #define HCI_EXT_FEATURE_CSB_PERIPHERAL_MASK 0x02 2033 #define HCI_EXT_FEATURE_CSB_PERIPHERAL_OFF 0 2034 #define HCI_CSB_PERIPHERAL_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_PERIPHERAL_OFF] & HCI_EXT_FEATURE_CSB_PERIPHERAL_MASK) 2035 2036 #define HCI_EXT_FEATURE_SYNC_TRAIN_CENTRAL_MASK 0x04 2037 #define HCI_EXT_FEATURE_SYNC_TRAIN_CENTRAL_OFF 0 2038 #define HCI_SYNC_TRAIN_CENTRAL_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_CENTRAL_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_CENTRAL_MASK) 2039 2040 #define HCI_EXT_FEATURE_SYNC_SCAN_PERIPHERAL_MASK 0x08 2041 #define HCI_EXT_FEATURE_SYNC_SCAN_PERIPHERAL_OFF 0 2042 #define HCI_SYNC_SCAN_PERIPHERAL_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_PERIPHERAL_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_PERIPHERAL_MASK) 2043 2044 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 2045 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 2046 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 2047 2048 #define HCI_EXT_FEATURE_SC_CTRLR_MASK 0x01 2049 #define HCI_EXT_FEATURE_SC_CTRLR_OFF 1 2050 #define HCI_SC_CTRLR_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_CTRLR_OFF] & HCI_EXT_FEATURE_SC_CTRLR_MASK) 2051 2052 #define HCI_EXT_FEATURE_PING_MASK 0x02 2053 #define HCI_EXT_FEATURE_PING_OFF 1 2054 #define HCI_PING_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_PING_OFF] & HCI_EXT_FEATURE_PING_MASK) 2055 2056 /** LMP Feature Bit */ 2057 #define HCI_LE_FEATURE_LE_ENCRYPTION_BIT_POS 0 /**< LE Encryption */ 2058 #define HCI_LE_FEATURE_CONN_PARAM_REQ_BIT_POS 1 /**< Connection Parameters Request Procedure*/ 2059 #define HCI_LE_FEATURE_EXT_REJ_IND_BIT_POS 2 /**< Extended Reject Indication */ 2060 #define HCI_LE_FEATURE_PERIPHERAL_INIT_FEAT_EXC_BIT_POS 3 /**< Peripheral-initiated Features Exchange */ 2061 #define HCI_LE_FEATURE_PING_BIT_POS 4 /**< LE Ping */ 2062 #define HCI_LE_FEATURE_DPLE_BIT_POS 5 /**< LE Data Packet Length Extension */ 2063 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_BIT_POS 6 /**< LL Privacy */ 2064 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_BIT_POS 7 /**< Extended Scanner Filter Policies */ 2065 #define HCI_LE_FEATURE_2M_PHY_BIT_POS 8 /**< LE 2M PHY */ 2066 #define HCI_LE_FEATURE_TX_MODULATION_INDEX_BIT_POS 9 /**< Stable Modulation Index - Transmitter */ 2067 #define HCI_LE_FEATURE_RX_MODULATION_INDEX_BIT_POS 10 /**< Stable Modulation Index - Receiver */ 2068 #define HCI_LE_FEATURE_CODED_PHY_BIT_POS 11 /**< LE Coded PHY */ 2069 #define HCI_LE_FEATURE_EXTENDED_ADVERTISING_BIT_POS 12 /**< LE Extended Advertising */ 2070 #define HCI_LE_FEATURE_PERIODIC_ADVERTISING_BIT_POS 13 /**< LE Periodic Advertising */ 2071 #define HCI_LE_FEATURE_CHNL_SELECTION_ALGO2_BIT_POS 14 /**< Channel Selection Algorithm #2 */ 2072 #define HCI_LE_FEATURE_POWER_CLASS1_BIT_POS 15 /**< LE Power Class 1 */ 2073 #define HCI_LE_FEATURE_MIN_USED_CHNL_PROC_BIT_POS 16 /**< Minimum Number of Used Channels Procedure */ 2074 #define HCI_LE_FEATURE_CONN_CTE_REQ_BIT_POS 17 /**< Connection CTE Request */ 2075 #define HCI_LE_FEATURE_CONN_CTE_RSP_BIT_POS 18 /**< Connection CTE Response */ 2076 #define HCI_LE_FEATURE_CONN_LESS_CTE_TX_BIT_POS 19 /**< Connectionless CTE Transmitter */ 2077 #define HCI_LE_FEATURE_CONN_LESS_CTE_RX_BIT_POS 20 /**< Connectionless CTE Receiver */ 2078 #define HCI_LE_FEATURE_ANTENNA_SWITCH_AOD_BIT_POS 21 /**< Antenna Switching During CTE Transmission (AoD) */ 2079 #define HCI_LE_FEATURE_ANTENNA_SWITCH_AOA_BIT_POS 22 /**< Antenna Switching During CTE Reception (AoA) */ 2080 #define HCI_LE_FEATURE_RECV_CONST_TONE_EXT_BIT_POS 23 /**< Receiving Constant Tone Extensions */ 2081 #define HCI_LE_FEATURE_PERIODIC_ADV_SYNC_TX_BIT_POS 24 /**< Periodic Advertising Sync Transfer -Sender */ 2082 #define HCI_LE_FEATURE_PERIODIC_ADV_SYNC_RX_BIT_POS 25 /**< Periodic Advertising Sync Transfer -Recipient */ 2083 #define HCI_LE_FEATURE_SLEEP_CLK_ACCURACY_UPDATE_BIT_POS 26 /**< Sleep Clock Accuracy Updates */ 2084 #define HCI_LE_FEATURE_RMT_PUB_KEY_VALIDATE_BIT_POS 27 /**< Remote Public Key Validation */ 2085 #define HCI_LE_FEATURE_CIS_CENTRAL_BIT_POS 28 /**< Connected Isochronous Stream – Central */ 2086 #define HCI_LE_FEATURE_CIS_PERIPHERAL_BIT_POS 29 /**< Connected Isochronous Stream – Peripheral */ 2087 #define HCI_LE_FEATURE_ISOC_BROADCASTER_BIT_POS 30 /**< Isochronous Broadcaster */ 2088 #define HCI_LE_FEATURE_SYNC_RX_BIT_POS 31 /**< Synchronized Receiver */ 2089 #define HCI_LE_FEATURE_ISOC_CHNL_BIT_POS 32 /**< Isochronous Channels (Host Support) */ 2090 #define HCI_LE_FEATURE_POWER_CTRL_REQ_BIT_POS 33 /**< LE Power Control Request */ 2091 #define HCI_LE_FEATURE_POWER_CHANGE_IND_BIT_POS 34 /**< LE Power Change Indication */ 2092 #define HCI_LE_FEATURE_PATH_LOSS_MONITO_BIT_POS 35 /**< LE Path Loss Monitoring */ 2093 #define HCI_LE_FEATURE_MAX_BIT_POS HCI_LE_FEATURE_PATH_LOSS_MONITO_BIT_POS /**< Max Possible Value */ 2094 2095 /* 2096 ** LE features encoding - page 0 2097 */ 2098 /* LE Encryption */ 2099 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 2100 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 2101 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 2102 2103 /* Connection Parameters Request Procedure */ 2104 #define HCI_LE_FEATURE_CONN_PARAM_REQ_MASK 0x02 2105 #define HCI_LE_FEATURE_CONN_PARAM_REQ_OFF 0 2106 #define HCI_LE_CONN_PARAM_REQ_SUPPORTED(x) ((x)[HCI_LE_FEATURE_CONN_PARAM_REQ_OFF] & HCI_LE_FEATURE_CONN_PARAM_REQ_MASK) 2107 2108 /* Extended Reject Indication */ 2109 #define HCI_LE_FEATURE_EXT_REJ_IND_MASK 0x04 2110 #define HCI_LE_FEATURE_EXT_REJ_IND_OFF 0 2111 #define HCI_LE_EXT_REJ_IND_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_REJ_IND_OFF] & HCI_LE_FEATURE_EXT_REJ_IND_MASK) 2112 2113 /* Peripheral-initiated Features Exchange : bit 3*/ 2114 #define HCI_LE_FEATURE_PERIPHERAL_INIT_FEAT_EXC_MASK 0x08 2115 #define HCI_LE_FEATURE_PERIPHERAL_INIT_FEAT_EXC_OFF 0 2116 #define HCI_LE_PERIPHERAL_INIT_FEAT_EXC_SUPPORTED(x) ((x)[HCI_LE_FEATURE_PERIPHERAL_INIT_FEAT_EXC_OFF] & HCI_LE_FEATURE_PERIPHERAL_INIT_FEAT_EXC_MASK) 2117 2118 /* LE Ping : bit 4*/ 2119 #define HCI_LE_FEATURE_PING_MASK 0x10 2120 #define HCI_LE_FEATURE_PING_OFF 0 2121 #define HCI_LE_PING_SUPPORTED(x) ((x)[HCI_LE_FEATURE_PING_OFF] & HCI_LE_FEATURE_PING_MASK) 2122 2123 /* Data length extension: bit 5 */ 2124 #define HCI_LE_FEATURE_DATA_LEN_EXT_MASK 0x20 2125 #define HCI_LE_FEATURE_DATA_LEN_EXT_OFF 0 2126 #define HCI_LE_DATA_LEN_EXT_SUPPORTED(x) ((x)[HCI_LE_FEATURE_DATA_LEN_EXT_OFF] & HCI_LE_FEATURE_DATA_LEN_EXT_MASK) 2127 2128 /* Enhanced privacy Feature: bit 6 */ 2129 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK 0x40 2130 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF 0 2131 #define HCI_LE_ENHANCED_PRIVACY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF] & HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK) 2132 2133 2134 /* Extended scanner filter policy : 7 */ 2135 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK 0x80 2136 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF 0 2137 #define HCI_LE_EXT_SCAN_FILTER_POLICY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF] & HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK) 2138 2139 /* 2140 ** LE features encoding - page 1 2141 */ 2142 2143 /* LE 2M PHY feature: bit 8 */ 2144 #define HCI_LE_FEATURE_2M_PHY_MASK 0x01 2145 #define HCI_LE_FEATURE_2M_PHY_OFF 1 2146 #define HCI_LE_2M_PHY_SUPPORTED(x) ((x)[ HCI_LE_FEATURE_2M_PHY_OFF] & HCI_LE_FEATURE_2M_PHY_MASK) 2147 2148 /* Stable Modulation Index - Transmitter feature: bit 9 */ 2149 //Todo 2150 2151 /* Stable Modulation Index - Receiver feature: bit 10 */ 2152 //Todo 2153 2154 /* LE Coded PHY(for LE long range) feature: bit 11 */ 2155 #define HCI_LE_FEATURE_CODED_PHY_MASK 0x08 2156 #define HCI_LE_FEATURE_CODED_PHY_OFF 1 2157 #define HCI_LE_CODED_PHY_SUPPORTED(x) ((x)[ HCI_LE_FEATURE_CODED_PHY_OFF] &HCI_LE_FEATURE_CODED_PHY_MASK) 2158 2159 /* LE Extended Advertising feature: bit 12 */ 2160 #define HCI_LE_FEATURE_EXTENDED_ADVERTISING_MASK 0x10 2161 #define HCI_LE_FEATURE_EXTENDED_ADVERTISING_OFF 1 2162 #define HCI_LE_EXTENDED_ADVERTISING_SUPPORTED(x) ((x)[ HCI_LE_FEATURE_EXTENDED_ADVERTISING_OFF] & HCI_LE_FEATURE_EXTENDED_ADVERTISING_MASK) 2163 2164 /* LE Periodic Advertising feature: bit 13 */ 2165 #define HCI_LE_FEATURE_PERIODIC_ADVERTISING_MASK 0x20 2166 #define HCI_LE_FEATURE_PERIODIC_ADVERTISING_OFF 1 2167 #define HCI_LE_PERIODIC_ADVERTISING_SUPPORTED(x) ((x)[ HCI_LE_FEATURE_PERIODIC_ADVERTISING_OFF] & HCI_LE_FEATURE_PERIODIC_ADVERTISING_MASK) 2168 2169 /* Connected Isochronous Stream: bit 28 and 29 */ 2170 #define HCI_LE_FEATURE_ISOC_CHANNELS_MASK 0x30 2171 #define HCI_LE_FEATURE_ISOC_CHANNELS_OFF 3 2172 #define HCI_LE_ISOC_CHANNELS_SUPPORTED(x) \ 2173 ((x)[HCI_LE_FEATURE_ISOC_CHANNELS_OFF] & HCI_LE_FEATURE_ISOC_CHANNELS_MASK) 2174 2175 /* Channel Selection Algorithm #2 feature: bit 14 */ 2176 //Todo 2177 2178 /* LE Power Class 1 feature: bit 15 */ 2179 //Todo 2180 2181 /* 2182 LE features encoding - page 2 2183 */ 2184 2185 /* Minimum Number of Used Channels Procedure feature: bit 16*/ 2186 //Todo 2187 2188 2189 /* 2190 ** Local Supported Commands encoding 2191 */ 2192 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 2193 2194 /* Supported Commands Byte 0 */ 2195 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 2196 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 2197 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 2198 2199 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 2200 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 2201 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 2202 2203 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 2204 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 2205 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 2206 2207 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 2208 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 2209 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 2210 2211 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 2212 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 2213 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 2214 2215 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 2216 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 2217 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 2218 2219 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 2220 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 2221 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 2222 2223 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 2224 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 2225 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 2226 2227 /* Supported Commands Byte 1 */ 2228 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 2229 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 2230 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 2231 2232 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 2233 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 2234 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 2235 2236 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 2237 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 2238 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 2239 2240 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 2241 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 2242 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 2243 2244 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 2245 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 2246 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 2247 2248 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 2249 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 2250 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 2251 2252 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 2253 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 2254 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 2255 2256 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 2257 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 2258 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 2259 2260 /* Supported Commands Byte 2 */ 2261 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 2262 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 2263 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 2264 2265 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 2266 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 2267 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 2268 2269 #define HCI_SUPP_COMMANDS_CENTRAL_LINK_KEY_MASK 0x04 2270 #define HCI_SUPP_COMMANDS_CENTRAL_LINK_KEY_OFF 2 2271 #define HCI_CENTRAL_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CENTRAL_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CENTRAL_LINK_KEY_MASK) 2272 2273 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 2274 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 2275 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 2276 2277 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 2278 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 2279 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 2280 2281 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 2282 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 2283 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 2284 2285 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 2286 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 2287 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 2288 2289 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 2290 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 2291 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 2292 2293 /* Supported Commands Byte 3, bits 2-7 reserved */ 2294 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 2295 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 2296 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 2297 2298 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 2299 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 2300 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 2301 2302 /* Supported Commands Byte 4, bit 0 reserved */ 2303 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 2304 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 2305 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 2306 2307 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 2308 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 2309 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 2310 2311 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 2312 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 2313 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 2314 2315 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 2316 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 2317 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 2318 2319 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 2320 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 2321 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 2322 2323 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 2324 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 2325 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 2326 2327 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 2328 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 2329 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 2330 2331 /* Supported Commands Byte 5 */ 2332 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 2333 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 2334 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 2335 2336 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 2337 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 2338 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 2339 2340 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 2341 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 2342 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 2343 2344 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 2345 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 2346 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 2347 2348 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 2349 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 2350 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 2351 2352 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 2353 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 2354 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 2355 2356 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 2357 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 2358 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 2359 2360 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 2361 #define HCI_SUPP_COMMANDS_RESET_OFF 5 2362 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 2363 2364 /* Supported Commands Byte 6 */ 2365 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 2366 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 2367 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 2368 2369 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 2370 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 2371 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 2372 2373 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 2374 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 2375 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 2376 2377 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 2378 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 2379 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 2380 2381 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 2382 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 2383 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 2384 2385 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 2386 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 2387 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 2388 2389 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 2390 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 2391 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 2392 2393 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 2394 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 2395 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 2396 2397 /* Supported Commands Byte 7 */ 2398 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 2399 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 2400 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 2401 2402 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 2403 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 2404 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 2405 2406 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 2407 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 2408 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 2409 2410 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 2411 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 2412 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 2413 2414 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 2415 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 2416 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 2417 2418 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 2419 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 2420 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 2421 2422 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 2423 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 2424 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 2425 2426 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 2427 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 2428 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 2429 2430 /* Supported Commands Byte 8, bits 4-5 are reserved in the specs but are successfully used in our host/controller */ 2431 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 2432 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 2433 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 2434 2435 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 2436 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 2437 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 2438 2439 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 2440 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 2441 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 2442 2443 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 2444 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 2445 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 2446 2447 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 2448 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 2449 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 2450 2451 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 2452 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 2453 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 2454 2455 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 2456 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 2457 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 2458 2459 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 2460 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 2461 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 2462 2463 /* Supported Commands Byte 9 */ 2464 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 2465 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 2466 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 2467 2468 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 2469 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 2470 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 2471 2472 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 2473 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 2474 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 2475 2476 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 2477 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 2478 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 2479 2480 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 2481 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 2482 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 2483 2484 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 2485 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 2486 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 2487 2488 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 2489 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 2490 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 2491 2492 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 2493 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 2494 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 2495 2496 /* Supported Commands Byte 10 */ 2497 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 2498 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 2499 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 2500 2501 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 2502 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 2503 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 2504 2505 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 2506 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 2507 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 2508 2509 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 2510 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2511 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 2512 2513 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 2514 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 2515 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 2516 2517 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 2518 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 2519 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 2520 2521 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 2522 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 2523 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 2524 2525 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 2526 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 2527 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 2528 2529 /* Supported Commands Byte 11 */ 2530 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 2531 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 2532 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 2533 2534 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 2535 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 2536 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 2537 2538 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 2539 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 2540 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 2541 2542 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 2543 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 2544 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 2545 2546 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 2547 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 2548 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 2549 2550 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 2551 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 2552 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 2553 2554 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 2555 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 2556 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 2557 2558 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 2559 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 2560 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 2561 2562 /* Supported Commands Byte 12, bits 2-3 reserved */ 2563 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 2564 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 2565 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 2566 2567 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 2568 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 2569 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 2570 2571 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 2572 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 2573 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 2574 2575 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 2576 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 2577 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 2578 2579 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 2580 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 2581 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 2582 2583 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 2584 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2585 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2586 2587 /* Supported Commands Byte 13, bits 4-7 reserved */ 2588 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2589 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2590 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2591 2592 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2593 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2594 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2595 2596 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2597 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2598 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2599 2600 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2601 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2602 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2603 2604 /* Supported Commands Byte 14, bits 0-2 and 4 reserved */ 2605 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2606 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2607 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2608 2609 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2610 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2611 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2612 2613 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2614 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2615 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2616 2617 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2618 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2619 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2620 2621 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2622 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2623 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2624 2625 /* Supported Commands Byte 15 */ 2626 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2627 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2628 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2629 2630 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2631 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2632 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2633 2634 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2635 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2636 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2637 2638 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2639 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2640 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2641 2642 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2643 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2644 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2645 2646 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2647 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2648 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2649 2650 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2651 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2652 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2653 2654 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2655 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2656 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2657 2658 /* Supported Commands Byte 16, bits 6-7 reserved */ 2659 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2660 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2661 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2662 2663 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2664 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2665 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2666 2667 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2668 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2669 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2670 2671 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2672 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2673 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2674 2675 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2676 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2677 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2678 2679 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2680 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2681 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2682 2683 /* Supported Commands Byte 17, bit 3 reserved */ 2684 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2685 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2686 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2687 2688 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2689 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2690 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2691 2692 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2693 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2694 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2695 2696 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2697 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2698 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2699 2700 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2701 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2702 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2703 2704 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2705 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2706 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2707 2708 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2709 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2710 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2711 2712 /* Supported Commands Byte 18, bits 4-7 reserved */ 2713 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2714 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2715 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2716 2717 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2718 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2719 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2720 2721 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2722 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2723 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2724 2725 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2726 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2727 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2728 2729 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK 0x80 2730 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF 18 2731 #define HCI_IO_CAPABILITY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK) 2732 2733 /* Supported Commands Byte 19 */ 2734 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2735 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2736 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2737 2738 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2739 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2740 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2741 2742 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2743 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2744 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2745 2746 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2747 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2748 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2749 2750 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2751 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2752 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2753 2754 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2755 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2756 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2757 2758 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2759 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2760 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2761 2762 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2763 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2764 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2765 2766 /* Supported Commands Byte 20, bits 0-1 and 5-7 reserved */ 2767 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2768 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2769 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2770 2771 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2772 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2773 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2774 2775 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2776 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2777 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2778 2779 /* Supported Commands Byte 21 */ 2780 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2781 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2782 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2783 2784 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2785 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2786 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2787 2788 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2789 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2790 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2791 2792 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2793 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2794 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2795 2796 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2797 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2798 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2799 2800 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2801 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2802 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2803 2804 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2805 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2806 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2807 2808 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2809 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2810 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2811 2812 /* Supported Commands Byte 22 */ 2813 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2814 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2815 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2816 2817 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2818 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2819 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2820 2821 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2822 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2823 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2824 2825 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2826 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2827 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2828 2829 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2830 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2831 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2832 2833 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2834 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2835 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2836 2837 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2838 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2839 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2840 2841 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2842 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2843 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2844 2845 /* Supported Commands Byte 23, bits 3-4 reserved */ 2846 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2847 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2848 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2849 2850 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2851 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2852 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2853 2854 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2855 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2856 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2857 2858 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2859 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2860 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2861 2862 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2863 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2864 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2865 2866 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2867 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2868 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2869 2870 /* Supported Commands Byte 24, bits 1, 7 reserved */ 2871 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2872 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2873 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2874 2875 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2876 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2877 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2878 2879 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2880 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2881 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2882 2883 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2884 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2885 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2886 2887 #define HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_MASK 0x20 2888 #define HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_OFF 24 2889 #define HCI_READ_LE_HOST_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_MASK) 2890 2891 #define HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_MASK 0x40 2892 #define HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_OFF 24 2893 #define HCI_WRITE_LE_HOST_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_MASK) 2894 2895 /* Supported Commands Byte 25, bit 3 reserved */ 2896 #define HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_MASK 0x01 2897 #define HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_OFF 25 2898 #define HCI_LE_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_MASK) 2899 2900 #define HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_MASK 0x02 2901 #define HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_OFF 25 2902 #define HCI_LE_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_MASK) 2903 2904 #define HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_MASK 0x04 2905 #define HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_OFF 25 2906 #define HCI_LE_READ_LOCAL_SUPPORTED_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_OFF] & HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_MASK) 2907 2908 #define HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_MASK 0x10 2909 #define HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_OFF 25 2910 #define HCI_LE_SET_RANDOM_ADDRESS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_OFF] & HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_MASK) 2911 2912 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_MASK 0x20 2913 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_OFF 25 2914 #define HCI_LE_SET_ADVERTISING_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_MASK) 2915 2916 #define HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_MASK 0x40 2917 #define HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_OFF 25 2918 #define HCI_LE_READ_ADVERTISING_CHANNEL_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_OFF] & HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_MASK) 2919 2920 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_MASK 0x80 2921 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_OFF 25 2922 #define HCI_LE_SET_ADVERTISING_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_MASK) 2923 2924 /* Supported Commands Byte 26 */ 2925 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_MASK 0x01 2926 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_OFF 26 2927 #define HCI_LE_SET_SCAN_RESPONSE_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_MASK) 2928 2929 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_MASK 0x02 2930 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_OFF 26 2931 #define HCI_LE_SET_ADVERTISE_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_MASK) 2932 2933 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_MASK 0x04 2934 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_OFF 26 2935 #define HCI_LE_SET_SCAN_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_MASK) 2936 2937 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_MASK 0x08 2938 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_OFF 26 2939 #define HCI_LE_SET_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_MASK) 2940 2941 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_MASK 0x10 2942 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_OFF 26 2943 #define HCI_LE_CREATE_CONNECTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_OFF] & HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_MASK) 2944 2945 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_MASK 0x20 2946 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_OFF 26 2947 #define HCI_LE_CREATE_CONNECTION_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_OFF] & HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_MASK) 2948 2949 #define HCI_SUPP_COMMANDS_LE_READ_FILTER_ACCEPT_LIST_SIZE_MASK 0x40 2950 #define HCI_SUPP_COMMANDS_LE_READ_FILTER_ACCEPT_LIST_SIZE_OFF 26 2951 #define HCI_LE_READ_FILTER_ACCEPT_LIST_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_FILTER_ACCEPT_LIST_SIZE_OFF] & HCI_SUPP_COMMANDS_LE_READ_FILTER_ACCEPT_LIST_SIZE_MASK) 2952 2953 #define HCI_SUPP_COMMANDS_LE_CLEAR_FILTER_ACCEPT_LIST_MASK 0x80 2954 #define HCI_SUPP_COMMANDS_LE_CLEAR_FILTER_ACCEPT_LIST_OFF 26 2955 #define HCI_LE_CLEAR_FILTER_ACCEPT_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CLEAR_FILTER_ACCEPT_LIST_OFF] & HCI_SUPP_COMMANDS_LE_CLEAR_FILTER_ACCEPT_LIST_MASK) 2956 2957 /* Supported Commands Byte 27 */ 2958 #define HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_FILTER_ACCEPT_LIST_MASK 0x01 2959 #define HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_FILTER_ACCEPT_LIST_OFF 27 2960 #define HCI_LE_ADD_DEVICE_TO_FILTER_ACCEPT_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_FILTER_ACCEPT_LIST_OFF] & HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_FILTER_ACCEPT_LIST_MASK) 2961 2962 #define HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_FILTER_ACCEPT_LIST_MASK 0x02 2963 #define HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_FILTER_ACCEPT_LIST_OFF 27 2964 #define HCI_LE_REMOVE_DEVICE_FROM_FILTER_ACCEPT_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_FILTER_ACCEPT_LIST_OFF] & HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_FILTER_ACCEPT_LIST_MASK) 2965 2966 #define HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_MASK 0x04 2967 #define HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_OFF 27 2968 #define HCI_LE_CONNECTION_UPDATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_OFF] & HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_MASK) 2969 2970 #define HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_MASK 0x08 2971 #define HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_OFF 27 2972 #define HCI_LE_SET_HOST_CHANNEL_CLASSIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_OFF] & HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_MASK) 2973 2974 #define HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_MASK 0x10 2975 #define HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_OFF 27 2976 #define HCI_LE_READ_CHANNEL_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_OFF] & HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_MASK) 2977 2978 #define HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_MASK 0x20 2979 #define HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_OFF 27 2980 #define HCI_LE_READ_REMOTE_USED_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_OFF] & HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_MASK) 2981 2982 #define HCI_SUPP_COMMANDS_LE_ENCRYPT_MASK 0x40 2983 #define HCI_SUPP_COMMANDS_LE_ENCRYPT_OFF 27 2984 #define HCI_LE_ENCRYPT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_ENCRYPT_OFF] & HCI_SUPP_COMMANDS_LE_ENCRYPT_MASK) 2985 2986 #define HCI_SUPP_COMMANDS_LE_RAND_MASK 0x80 2987 #define HCI_SUPP_COMMANDS_LE_RAND_OFF 27 2988 #define HCI_LE_RAND_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RAND_OFF] & HCI_SUPP_COMMANDS_LE_RAND_MASK) 2989 2990 2991 /* Supported Commands Byte 28, bit 7 reserved */ 2992 #define HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_MASK 0x01 2993 #define HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_OFF 28 2994 #define HCI_LE_START_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_MASK) 2995 2996 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_MASK 0x02 2997 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_OFF 28 2998 #define HCI_LE_LONG_TERM_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_MASK) 2999 3000 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_MASK 0x04 3001 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_OFF 28 3002 #define HCI_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_OFF] & HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_MASK) 3003 3004 #define HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_MASK 0x08 3005 #define HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_OFF 28 3006 #define HCI_LE_READ_SUPPORTED_STATES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_OFF] & HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_MASK) 3007 3008 #define HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_MASK 0x10 3009 #define HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_OFF 28 3010 #define HCI_LE_RECEIVER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_OFF] & HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_MASK) 3011 3012 #define HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_MASK 0x20 3013 #define HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_OFF 28 3014 #define HCI_LE_TRANSMITTER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_OFF] & HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_MASK) 3015 3016 #define HCI_SUPP_COMMANDS_LE_TEST_END_MASK 0x40 3017 #define HCI_SUPP_COMMANDS_LE_TEST_END_OFF 28 3018 #define HCI_LE_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_TEST_END_OFF] & HCI_SUPP_COMMANDS_LE_TEST_END_MASK) 3019 3020 /* Supported Commands Byte 29, bits 0-2 reserved */ 3021 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 3022 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 3023 #define HCI_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 3024 3025 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 3026 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 3027 #define HCI_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 3028 3029 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 3030 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 3031 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 3032 3033 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 3034 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 3035 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 3036 3037 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 3038 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 3039 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 3040 3041 3042 /* Supported Commands (Byte 30) */ 3043 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 3044 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 3045 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 3046 3047 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 3048 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 3049 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 3050 3051 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 3052 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 3053 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 3054 3055 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 3056 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 3057 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 3058 3059 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 3060 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 3061 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 3062 3063 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 3064 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 3065 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 3066 3067 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x40 3068 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 3069 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 3070 3071 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x80 3072 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 3073 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 3074 3075 /* Supported Commands Byte 31 */ 3076 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST 0x01 3077 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_OFF 31 3078 #define HCI_SET_CONLESS_PERIPHERAL_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST) 3079 3080 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_RECEIVE 0x02 3081 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_RECEIVE_OFF 31 3082 #define HCI_SET_CONLESS_PERIPHERAL_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_RECEIVE) 3083 3084 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x04 3085 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 3086 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 3087 3088 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x08 3089 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 3090 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 3091 3092 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x10 3093 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 3094 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 3095 3096 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x20 3097 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 3098 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 3099 3100 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_DATA 0x40 3101 #define HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_DATA_OFF 31 3102 #define HCI_SET_CONLESS_PERIPHERAL_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_PERIPHERAL_BRCST_DATA) 3103 3104 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x80 3105 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 3106 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 3107 3108 /* Supported Commands Byte 32 */ 3109 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x01 3110 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 3111 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 3112 3113 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK 0x02 3114 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF 32 3115 #define HCI_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK) 3116 3117 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK 0x04 3118 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF 32 3119 #define HCI_READ_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK) 3120 3121 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK 0x08 3122 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF 32 3123 #define HCI_WRITE_SECURE_CONNS_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK) 3124 3125 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK 0x10 3126 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF 32 3127 #define HCI_READ_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK) 3128 3129 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK 0x20 3130 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF 32 3131 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK) 3132 3133 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK 0x40 3134 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF 32 3135 #define HCI_READ_LOCAL_OOB_EXTENDED_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK) 3136 3137 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK 0x80 3138 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF 32 3139 #define HCI_WRITE_SECURE_CONNECTIONS_TEST_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK) 3140 3141 /* supported LE remote control connection parameter request reply */ 3142 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK 0x10 3143 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF 33 3144 #define HCI_LE_RC_CONN_PARAM_UPD_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF] & HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK) 3145 3146 #define HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK 0x20 3147 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF 33 3148 #define HCI_LE_RC_CONN_PARAM_UPD_NEG_RPY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF] & HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK) 3149 3150 #if defined(MPAF_ZIGBEE) 3151 #define HCI_BRCM_I15DOT4_COMMAND (0x0177 | HCI_GRP_VENDOR_SPECIFIC) 3152 #endif 3153 /* 3154 Commands of HCI_GRP_VENDOR_SPECIFIC group for WIDCOMM SW LM Simulator 3155 */ 3156 #ifdef _WIDCOMM 3157 3158 #define HCI_SET_HCI_TRACE (0x0001 | HCI_GRP_VENDOR_SPECIFIC) 3159 #define HCI_SET_LM_TRACE (0x0002 | HCI_GRP_VENDOR_SPECIFIC) 3160 #define HCI_WRITE_COUNTRY_CODE (0x0004 | HCI_GRP_VENDOR_SPECIFIC) 3161 #define HCI_READ_LM_HISTORY (0x0005 | HCI_GRP_VENDOR_SPECIFIC) 3162 #define HCI_WRITE_BD_ADDR (0x0006 | HCI_GRP_VENDOR_SPECIFIC) 3163 #define HCI_DISABLE_ENCRYPTION (0x0007 | HCI_GRP_VENDOR_SPECIFIC) 3164 #define HCI_DISABLE_AUTHENTICATION (0x0008 | HCI_GRP_VENDOR_SPECIFIC) 3165 #define HCI_GENERIC_LC_CMD (0x000A | HCI_GRP_VENDOR_SPECIFIC) 3166 #define HCI_INCR_POWER (0x000B | HCI_GRP_VENDOR_SPECIFIC) 3167 #define HCI_DECR_POWER (0x000C | HCI_GRP_VENDOR_SPECIFIC) 3168 3169 /* Definitions for the local transactions */ 3170 #define LM_DISCONNECT (0x00D0 | HCI_GRP_VENDOR_SPECIFIC) 3171 #define LM_AUTHENTICATION_REQUESTED (0x00D1 | HCI_GRP_VENDOR_SPECIFIC) 3172 #define LM_SET_CONN_ENCRYPTION (0x00D2 | HCI_GRP_VENDOR_SPECIFIC) 3173 #define LM_START_ENCRYPT_KEY_SIZE (0x00D3 | HCI_GRP_VENDOR_SPECIFIC) 3174 #define LM_START_ENCRYPTION (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 3175 #define LM_STOP_ENCRYPTION (0x00D5 | HCI_GRP_VENDOR_SPECIFIC) 3176 #define LM_CHANGE_CONN_PACKET_TYPE (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 3177 #define LM_RMT_NAME_REQUEST (0x00D7 | HCI_GRP_VENDOR_SPECIFIC) 3178 #define LM_READ_RMT_FEATURES (0x00D8 | HCI_GRP_VENDOR_SPECIFIC) 3179 #define LM_READ_RMT_VERSION_INFO (0x00D9 | HCI_GRP_VENDOR_SPECIFIC) 3180 #define LM_READ_RMT_TIMING_INFO (0x00DA | HCI_GRP_VENDOR_SPECIFIC) 3181 #define LM_READ_RMT_CLOCK_OFFSET (0x00DB | HCI_GRP_VENDOR_SPECIFIC) 3182 #define LM_HOLD_MODE (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 3183 #define LM_EXIT_PARK_MODE (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 3184 3185 #define LM_SCO_LINK_REQUEST (0x00E0 | HCI_GRP_VENDOR_SPECIFIC) 3186 #define LM_SCO_CHANGE (0x00E4 | HCI_GRP_VENDOR_SPECIFIC) 3187 #define LM_SCO_REMOVE (0x00E8 | HCI_GRP_VENDOR_SPECIFIC) 3188 #define LM_MAX_SLOTS (0x00F1 | HCI_GRP_VENDOR_SPECIFIC) 3189 #define LM_MAX_SLOTS_REQUEST (0x00F2 | HCI_GRP_VENDOR_SPECIFIC) 3190 3191 #ifdef INCLUDE_OPTIONAL_PAGING_SCHEME 3192 #define LM_OPTIONAL_PAGE_REQUEST (0x00F3 | HCI_GRP_VENDOR_SPECIFIC) 3193 #define LM_OPTIONAL_PAGESCAN_REQUEST (0x00F4 | HCI_GRP_VENDOR_SPECIFIC) 3194 #endif 3195 3196 #define LM_SETUP_COMPLETE (0x00FF | HCI_GRP_VENDOR_SPECIFIC) 3197 3198 #define LM_HIST_SEND_LMP_FRAME (0x0100 | HCI_GRP_VENDOR_SPECIFIC) 3199 #define LM_HIST_RECV_LMP_FRAME (0x0101 | HCI_GRP_VENDOR_SPECIFIC) 3200 #define LM_HIST_HCIT_ERROR (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 3201 #define LM_HIST_PER_INQ_TOUT (0x0103 | HCI_GRP_VENDOR_SPECIFIC) 3202 #define LM_HIST_INQ_SCAN_TOUT (0x0104 | HCI_GRP_VENDOR_SPECIFIC) 3203 #define LM_HIST_PAGE_SCAN_TOUT (0x0105 | HCI_GRP_VENDOR_SPECIFIC) 3204 #define LM_HIST_RESET_TOUT (0x0106 | HCI_GRP_VENDOR_SPECIFIC) 3205 #define LM_HIST_MANDAT_PSCAN_TOUT (0x0107 | HCI_GRP_VENDOR_SPECIFIC) 3206 #define LM_HIST_ACL_START_TRANS (0x0108 | HCI_GRP_VENDOR_SPECIFIC) 3207 #define LM_HIST_ACL_HOST_REPLY (0x0109 | HCI_GRP_VENDOR_SPECIFIC) 3208 #define LM_HIST_ACL_TIMEOUT (0x010A | HCI_GRP_VENDOR_SPECIFIC) 3209 #define LM_HIST_ACL_TX_COMP (0x010B | HCI_GRP_VENDOR_SPECIFIC) 3210 #define LM_HIST_ACL_HCID_SUSPENDED (0x010C | HCI_GRP_VENDOR_SPECIFIC) 3211 #define LM_HIST_ACL_FAILED (0x010D | HCI_GRP_VENDOR_SPECIFIC) 3212 #define LM_HIST_HCI_COMMAND (0x010E | HCI_GRP_VENDOR_SPECIFIC) 3213 3214 #define LM_HIST_HCI_EVENT (0x010F | HCI_GRP_VENDOR_SPECIFIC) 3215 #define LM_HIST_HCI_UPDATA (0x0110 | HCI_GRP_VENDOR_SPECIFIC) 3216 #define LM_HIST_HCI_DNDATA (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 3217 3218 #define HCI_ENTER_TEST_MODE (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 3219 #define HCI_LMP_TEST_CNTRL (0x0301 | HCI_GRP_VENDOR_SPECIFIC) 3220 #define HCI_DEBUG_LC_CMD_MIN (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 3221 #define HCI_DEBUG_LC_CMD_MAX (0x03FF | HCI_GRP_VENDOR_SPECIFIC) 3222 #define HCI_DEBUG_LC_COMMAND HCI_DEBUG_LC_CMD_MAX 3223 #endif 3224 #define HCI_BRCM_LQ_LE_STATS (0x00ED | HCI_GRP_VENDOR_SPECIFIC) 3225 #define HCI_BRCM_LQ_BREDR_STATS (0x01CE | HCI_GRP_VENDOR_SPECIFIC) 3226 #endif 3227
