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Searched refs:GPIO_PRT_INTR_MASKED_EDGE5_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_gpio_v3.h234 #define GPIO_PRT_INTR_MASKED_EDGE5_Pos 5UL macro
Dcyip_gpio_v5.h240 #define GPIO_PRT_INTR_MASKED_EDGE5_Pos 5UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_gpio.h233 #define GPIO_PRT_INTR_MASKED_EDGE5_Pos 5UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_gpio.h249 #define GPIO_PRT_INTR_MASKED_EDGE5_Pos 5UL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe_remaps.h1852 #define GPIO_PRT_INTR_MASKED_EDGE5_Pos GPIO_PRT_V2_INTR_MASKED_EDGE5_Pos macro