Home
last modified time | relevance | path

Searched refs:FLASHC_FLASH_CTL (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_flash_v2.c863 FLASHC_FLASH_CTL |= _VAL2FLD(FLASHC_FLASH_CTL_MAIN_ECC_INJ_EN, 1U); in Cy_Flashc_InjectECC()
872 FLASHC_FLASH_CTL |= _VAL2FLD(FLASHC_FLASH_CTL_WORK_ECC_INJ_EN, 1U); in Cy_Flashc_InjectECC()
881 FLASHC_FLASH_CTL |= _VAL2FLD(FLASHC_CM0_CA_CTL0_RAM_ECC_INJ_EN, 1U); in Cy_Flashc_InjectECC()
907 FLASHC_FLASH_CTL &= ~FLASHC_FLASH_CTL_MAIN_ECC_INJ_EN_Msk; in Cy_Flashc_InjectECC_Disable()
910 FLASHC_FLASH_CTL &= ~FLASHC_FLASH_CTL_WORK_ECC_INJ_EN_Msk; in Cy_Flashc_InjectECC_Disable()
913 FLASHC_FLASH_CTL &= ~FLASHC_CM0_CA_CTL0_RAM_ECC_INJ_EN_Msk; in Cy_Flashc_InjectECC_Disable()
1445 FLASHC_FLASH_CTL |= FLASHC_FLASH_CTL_WORK_ECC_EN_Msk; in Cy_Flashc_WorkECCEnable()
1457 FLASHC_FLASH_CTL &= (uint32_t) ~FLASHC_FLASH_CTL_WORK_ECC_EN_Msk; in Cy_Flashc_WorkECCDisable()
1469 FLASHC_FLASH_CTL |= FLASHC_FLASH_CTL_MAIN_ECC_EN_Msk; in Cy_Flashc_MainECCEnable()
1481 FLASHC_FLASH_CTL &= (uint32_t) ~FLASHC_FLASH_CTL_MAIN_ECC_EN_Msk; in Cy_Flashc_MainECCDisable()
[all …]
Dcy_flash.c1829 FLASHC_FLASH_CTL |= FLASHC_FLASH_CTL_ECC_EN_Msk; in Cy_Flashc_ECCEnable()
1845 FLASHC_FLASH_CTL &= (uint32_t) ~FLASHC_FLASH_CTL_ECC_EN_Msk; in Cy_Flashc_ECCDisable()
1933 FLASHC_FLASH_CTL |= (_VAL2FLD(FLASHC_FLASH_CTL_BANK_MODE, 1U) | in Cy_Flashc_Dual_Bank_Mode_Enable()
1948 FLASHC_FLASH_CTL &= (uint32_t) ~(FLASHC_FLASH_CTL_BANK_MODE_Msk | in Cy_Flashc_Dual_Bank_Mode_Disable()
1969 FLASHC_FLASH_CTL |= FLASHC_V2_FLASH_CTL_WORK_BANK_MODE_Msk; in Cy_Flashc_SetWorkBankMode()
1973 FLASHC_FLASH_CTL &= (uint32_t) ~FLASHC_V2_FLASH_CTL_WORK_BANK_MODE_Msk; in Cy_Flashc_SetWorkBankMode()
1986 uint32_t bank_mode = _FLD2VAL(FLASHC_V2_FLASH_CTL_WORK_BANK_MODE, FLASHC_FLASH_CTL); in Cy_Flashc_GetWorkBankMode()
2009 FLASHC_FLASH_CTL |= FLASHC_V2_FLASH_CTL_MAIN_BANK_MODE_Msk; in Cy_Flashc_SetMainBankMode()
2013 FLASHC_FLASH_CTL &= (uint32_t) ~FLASHC_V2_FLASH_CTL_MAIN_BANK_MODE_Msk; in Cy_Flashc_SetMainBankMode()
2026 uint32_t bank_mode = _FLD2VAL(FLASHC_V2_FLASH_CTL_MAIN_BANK_MODE, FLASHC_FLASH_CTL); in Cy_Flashc_GetMainBankMode()
[all …]
Dcy_syslib.c488 FLASHC_FLASH_CTL = _CLR_SET_FLD32U(FLASHC_FLASH_CTL, FLASHC_FLASH_CTL_WS, waitStates); in Cy_SysLib_SetWaitStates()
505 FLASHC_FLASH_CTL = _CLR_SET_FLD32U(FLASHC_FLASH_CTL, FLASHC_FLASH_CTL_MAIN_WS, waitStates); in Cy_SysLib_SetWaitStates()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h713 #define FLASHC_FLASH_CTL (((FLASHC_Type *)(FLASHC))->FLASH_CTL) macro
725 #define FLASHC_FLASH_CTL (((FLASHC_V1_Type *) cy_device->flashcBase)->FLASH_CTL) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h383 #define FLASHC_FLASH_CTL (((FLASHC_Type *)(FLASHC))->FLASH_CTL) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h2530 #define FLASHC_FLASH_CTL (((FLASHC_Type *)(FLASHC))->FLASH_CTL) macro