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Searched refs:CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_tcpwm_pwm.c101 …swapOverflowUnderflow ? CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED : CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM); in Cy_TCPWM_PWM_Init()
205 …wapOverflowUnderflow ? CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED : CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM) | in Cy_TCPWM_PWM_Init()
213 …wapOverflowUnderflow ? CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED : CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM) | in Cy_TCPWM_PWM_Init()
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_pwm.c143 … bool is_center_aligned = (pwm_ctrl_reg == (CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM | cc1_ignore_mask)) || in cyhal_pwm_set_period_and_compare()
146 …T_TR_CTRL2(obj->tcpwm.base, obj->tcpwm.resource.channel_num) == CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM) || in cyhal_pwm_set_period_and_compare()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_tcpwm_pwm.h393 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM (_VAL2FLD(TCPWM_CNT_TR_CTRL2_CC_MATCH_MODE, CY_TCPWM_PWM_TR… macro
420 #define CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM (_VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC0_MATCH_MODE, CY_T… macro