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Searched refs:CY_SYSINT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysint.c304 …if (CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_V2_CM0_SYSTEM_INT_CTL_CPU_INT_VALID, CPUSS_CM0_SYSTEM_INT_C… in Cy_SysInt_GetNvicConnection()
309 …if ((!CY_CPUSS_V1) && (CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_V2_CM4_SYSTEM_INT_CTL_CPU_INT_VALID, CPU… in Cy_SysInt_GetNvicConnection()
318 …if ((CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM0_SYSTEM_INT_CTL_CPU_INT_VALID, CPUSS_CM0_SYSTEM_INT_CTL… in Cy_SysInt_GetNvicConnection()
323 …if (CY_IS_CM7_CORE_0 && (CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM7_0_SYSTEM_INT_CTL_CPU_INT_VALID, CP… in Cy_SysInt_GetNvicConnection()
327 …else if ((CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_VALID, CPUSS_CM7_1_SYSTE… in Cy_SysInt_GetNvicConnection()
348 …if(CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_V2_CM0_INT0_STATUS_SYSTEM_INT_VALID, CPUSS_CM0_INT_STATUS[lo… in Cy_SysInt_GetInterruptActive()
355 …if(CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_V2_CM4_INT0_STATUS_SYSTEM_INT_VALID, CPUSS_CM4_INT_STATUS[lo… in Cy_SysInt_GetInterruptActive()
365 …if(CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM0_INT0_STATUS_SYSTEM_INT_VALID, CPUSS_CM0_INT_STATUS_BASE[… in Cy_SysInt_GetInterruptActive()
370 …if((CY_IS_CM7_CORE_0) && (CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM7_0_INT_STATUS_SYSTEM_INT_VALID, CP… in Cy_SysInt_GetInterruptActive()
374 …else if(CY_SYSINT_ENABLE == _FLD2VAL(CPUSS_CM7_1_INT_STATUS_SYSTEM_INT_VALID, CPUSS_CM7_1_INT_STAT… in Cy_SysInt_GetInterruptActive()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_sysint.h468 #define CY_SYSINT_ENABLE (1UL) /**< Enable interrupt */ macro