Searched refs:CY_SYSCLK_FLLPLL_OUTPUT_AUTO (Results 1 – 6 of 6) sorted by relevance
| /hal_infineon-latest/mtb-pdl-cat1/drivers/source/ |
| D | cy_sysclk.c | 1843 cy_stc_pll_manual_config_t manualConfig = {0U, 0U, 0U, false, CY_SYSCLK_FLLPLL_OUTPUT_AUTO}; in Cy_SysClk_PllConfigure()
2567 …if (((uint32_t)CY_SYSCLK_FLLPLL_OUTPUT_AUTO == _FLD2VAL(SRSS_CLK_PLL_CONFIG_BYPASS_SEL, SRSS_CLK_… in Cy_SysClk_DeepSleepCallback()
2658 …T(SRSS_CLK_PLL_CONFIG[fllpll - 1UL], SRSS_CLK_PLL_CONFIG_BYPASS_SEL, CY_SYSCLK_FLLPLL_OUTPUT_AUTO); in Cy_SysClk_DeepSleepCallback()
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| D | cy_sysclk_v2.c | 3731 …fig_t fllCfg = {0UL,0U,CY_SYSCLK_FLL_CCO_RANGE0,false,0U,0U,0U,0U,CY_SYSCLK_FLLPLL_OUTPUT_AUTO,0U}; in Cy_SysClk_FllGetFrequency()
4000 …cy_stc_pll_manual_config_t manualConfig = {0U,0U,0U,false,CY_SYSCLK_FLLPLL_OUTPUT_AUTO, 0, false, … in Cy_SysClk_Pll400MConfigure()
4229 …cy_stc_pll_manual_config_t pllcfg = {0U,0U,0U,false,CY_SYSCLK_FLLPLL_OUTPUT_AUTO, 0, false, false,… in Cy_SysClk_Pll400MGetFrequency()
4485 …cy_stc_pll_manual_config_t pllcfg = {0U,0U,0U,false,CY_SYSCLK_FLLPLL_OUTPUT_AUTO, 0, false, false,… in Cy_SysClk_Pll200MGetFrequency()
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| D | cy_pra.c | 2966 …if (((uint32_t)CY_SYSCLK_FLLPLL_OUTPUT_AUTO == _FLD2VAL(SRSS_CLK_PLL_CONFIG_BYPASS_SEL, SRSS_CLK_… in Cy_PRA_ClkDSBeforeTransition()
3060 …T(SRSS_CLK_PLL_CONFIG[fllPll - 1UL], SRSS_CLK_PLL_CONFIG_BYPASS_SEL, CY_SYSCLK_FLLPLL_OUTPUT_AUTO); in Cy_PRA_ClkDSAfterTransition()
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| /hal_infineon-latest/mtb-hal-cat1/source/ |
| D | cyhal_usb_dev.c | 250 cfg.outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO; in _cyhal_usb_dev_init_pll()
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| D | cyhal_clock.c | 1553 rslt = Cy_SysClk_FllConfigure(src_freq, hz/*new_freq*/, CY_SYSCLK_FLLPLL_OUTPUT_AUTO); in _cyhal_clock_set_frequency_fll()
1754 .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO, in _cyhal_clock_set_frequency_pll()
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| /hal_infineon-latest/mtb-pdl-cat1/drivers/include/ |
| D | cy_sysclk.h | 2174 …CY_SYSCLK_FLLPLL_OUTPUT_AUTO = 0U, /**< Output FLL/PLL input source when not locked, and FLL/PLL… enumerator
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