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Searched refs:CY_SRSS_NUM_PLL (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysclk_v2.c3313 … if (clkPath < (CY_SRSS_NUM_PLL) && Cy_SysClk_PllIsEnabled(clkPath)) /* PLL? (always path 1...N)*/ in Cy_SysClk_ClkPathGetFrequency()
3327 else if ((clkPath != 0UL) && (clkPath <= (CY_SRSS_NUM_PLL)) && Cy_SysClk_PllIsEnabled(clkPath)) in Cy_SysClk_ClkPathGetFrequency()
3341 …else if ((clkPath > 0UL) && (clkPath <= CY_SRSS_NUM_PLL) && Cy_SysClk_PllIsEnabled(clkPath)) /* PL… in Cy_SysClk_ClkPathGetFrequency()
5458 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllIsEnabled()
5470 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllIsEnabled()
5481 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllIsEnabled()
5499 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllLocked()
5511 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllLocked()
5523 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllLocked()
5543 CY_ASSERT_L1(clkPath < (CY_SRSS_NUM_PLL)); in Cy_SysClk_PllLostLock()
[all …]
Dcy_sysclk.c1398 else if (clkPath <= CY_SRSS_NUM_PLL) /* PLL? (always path 1...N)*/ in Cy_SysClk_ClkPathGetFrequency()
1779 CY_ASSERT_L1(clkPath < CY_SRSS_NUM_PLL); in Cy_SysClk_PllIsEnabled()
1787 CY_ASSERT_L1(clkPath < CY_SRSS_NUM_PLL); in Cy_SysClk_PllLocked()
1800 CY_ASSERT_L1(clkPath < CY_SRSS_NUM_PLL); in Cy_SysClk_PllLostLock()
1813 if (clkPath < CY_SRSS_NUM_PLL) in Cy_SysClk_PllDisable()
1915 if (clkPath > CY_SRSS_NUM_PLL) /* invalid clock path number */ in Cy_SysClk_PllManualConfigure()
1963 if (clkPath < CY_SRSS_NUM_PLL) in Cy_SysClk_PllGetConfiguration()
1982 if (clkPath < CY_SRSS_NUM_PLL) in Cy_SysClk_PllEnable()
2552 for (fllpll = 0UL; fllpll <= CY_SRSS_NUM_PLL; fllpll++) in Cy_SysClk_DeepSleepCallback()
2621 for (fllpll = 0UL; fllpll <= CY_SRSS_NUM_PLL; fllpll++) in Cy_SysClk_DeepSleepCallback()
[all …]
Dcy_pra_cfg.c709 …if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_1) && (devConfig->pll0Enable) && (devConfig->pll0OutputMode … in Cy_PRA_GetInputSourceFreq()
727 …if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) && (devConfig->pll1Enable) && (devConfig->pll1OutputMode … in Cy_PRA_GetInputSourceFreq()
1337 if ((pll == CY_PRA_DEFAULT_ZERO) || (pll > CY_SRSS_NUM_PLL)) in Cy_PRA_ValidatePLL()
1429 if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_1) && (devConfig->pll0Enable)) in Cy_PRA_ValidateAllPLL()
1443 …if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) && (devConfig->pll1Enable) && (retStatus == CY_PRA_STATUS… in Cy_PRA_ValidateAllPLL()
2474 if ((pll > CY_PRA_DEFAULT_ZERO) && (pll <= CY_SRSS_NUM_PLL)) /* 0 is invalid pll number */ in Cy_PRA_CalculatePLLOutFreq()
2828 if (CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_1) in Cy_PRA_SystemConfig()
2872 if (CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) in Cy_PRA_SystemConfig()
Dcy_pra.c1102 …(((message->praData1) > CY_PRA_CLKPATH_0) && ((message->praData1) <= CY_SRSS_NUM_PLL)) /* 0 is inv… in Cy_PRA_ProcessCmd()
2286 … (((cy_stc_pra_clk_pll_manconfigure_t *) message->praData1)->clkPath > CY_SRSS_NUM_PLL)) in Cy_PRA_ProcessCmd()
2321 || (message->praData1 > CY_SRSS_NUM_PLL) || (message->praData1 == 0UL)) in Cy_PRA_ProcessCmd()
2951 for (fllPll = 0UL; fllPll <= CY_SRSS_NUM_PLL; fllPll++) in Cy_PRA_ClkDSBeforeTransition()
3023 for (fllPll = 0UL; fllPll <= CY_SRSS_NUM_PLL; fllPll++) in Cy_PRA_ClkDSAfterTransition()
3160 if (CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_1) in Cy_PRA_ClocksReset()
3170 if (CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) in Cy_PRA_ClocksReset()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h310 #define CY_SRSS_NUM_PLL (SRSS_NUM_TOTAL_PLL) macro
483 #define CY_SRSS_NUM_PLL ((uint32_t)(cy_device->srssNumPll)) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h126 #define CY_SRSS_NUM_PLL SRSS_NUM_TOTAL_PLL macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h942 #define CY_SRSS_NUM_PLL SRSS_NUM_TOTAL_PLL macro