Searched refs:CY_PRA_INDX_SRSS_SRSS_INTR_MASK (Results 1 – 4 of 4) sorted by relevance
777 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_WDT_MATCH, 0U); in Cy_WDT_MaskInterrupt()799 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_WDT_MATCH, 1U); in Cy_WDT_UnmaskInterrupt()
595 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 1U); in Cy_LVD_SetInterruptMask()615 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 0U); in Cy_LVD_ClearInterruptMask()
383 #define CY_PRA_INDX_SRSS_SRSS_INTR_MASK (3U) macro
127 regIndexToAddr[CY_PRA_INDX_SRSS_SRSS_INTR_MASK].addr = &SRSS_SRSS_INTR_MASK; in Cy_PRA_Init()
