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Searched refs:CY_PDM_PCM_SEL_SRSS_CLOCK (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_pdm_pcm_v2.h200 CY_PDM_PCM_SEL_SRSS_CLOCK = 0U, /**< Interface clock is selected as clk_if_srss[0]*/ enumerator
482 #define CY_PDM_PCM_IS_CLK_SEL_VALID(clksel) (((clksel) == CY_PDM_PCM_SEL_SRSS_CLOCK) || \
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_pdmpcm.c298 .clksel = CY_PDM_PCM_SEL_SRSS_CLOCK,