Home
last modified time | relevance | path

Searched refs:CY_I2S_IS_CLK_DIV_VALID (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_i2s.c62 CY_ASSERT_L2(CY_I2S_IS_CLK_DIV_VALID(clockDiv)); in Cy_I2S_Init()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_i2s.h498 #define CY_I2S_IS_CLK_DIV_VALID(clkDiv) ((clkDiv) <= 63U) macro