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Searched refs:CY_ETH_QS2_2 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_ethif.h213 #define CY_ETH_QS2_2 (2U) macro
452 …bool bTxQueueDisable[CY_ETH_QS2_2+1]; /**< Tx Queue0-2 || 0: Queue Enabled, 1: Queue Dis…
453 …bool bRxQueueDisable[CY_ETH_QS2_2+1]; /**< Rx Queue0-2 || 0: Queue Enabled, 1: Queue Dis…
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ethif.c477 … if ((pu8TxBuffer == NULL) || (u16Length > CY_ETH_SIZE_MAX_FRAME) || (u8QueueIndex > CY_ETH_QS2_2)) in Cy_ETHIF_TransmitFrame()