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Searched refs:CY_AXIDMAC_INTR_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_dma_dmac.c456 Cy_AXIDMAC_Channel_ClearInterrupt(base, channel, CY_AXIDMAC_INTR_MASK); in _cyhal_dma_dmac_irq_handler()
527 Cy_AXIDMAC_Channel_SetInterruptMask(base, obj->resource.channel_num, CY_AXIDMAC_INTR_MASK); in _cyhal_dma_dmac_stage()
544 Cy_AXIDMAC_Channel_ClearInterrupt(base, obj->resource.channel_num, CY_AXIDMAC_INTR_MASK); in _cyhal_dma_dmac_stage()
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_axidmac.h247 #define CY_AXIDMAC_INTR_MASK (CY_AXIDMAC_INTR_COMPLETION | \ macro
255 …ine CY_AXIDMAC_IS_INTR_MASK_VALID(intr) (0UL == ((intr) & ((uint32_t) ~CY_AXIDMAC_INTR_MASK)))