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Searched refs:CY_ALIGN (Results 1 – 25 of 38) sorted by relevance

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/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_ecc_domain_params.c61 CY_ALIGN(4) static const uint8_t ed25519Prime[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
69 CY_ALIGN(4) static const uint8_t ed25519A[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
77 CY_ALIGN(4) static const uint8_t ed25519D[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
87 CY_ALIGN(4) static const uint8_t ed25519Order[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
95 CY_ALIGN(4) static const uint8_t ed25519PrimeBarrett[CY_CRYPTO_ECC_ED25519_BYTE_SIZE + 1u] = in Cy_Crypto_Core_EDW_GetCurveParams()
104 CY_ALIGN(4) static const uint8_t ed25519OrderBarrett[CY_CRYPTO_ECC_ED25519_BYTE_SIZE + 1u] = in Cy_Crypto_Core_EDW_GetCurveParams()
115 CY_ALIGN(4) static const uint8_t ed25519BasePointX[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
125 CY_ALIGN(4) static const uint8_t ed25519BasePointY[CY_CRYPTO_ECC_ED25519_BYTE_SIZE] = in Cy_Crypto_Core_EDW_GetCurveParams()
177 CY_ALIGN(4) static const uint8_t eccP192Polynomial[CY_CRYPTO_ECC_P192_BYTE_SIZE] = in Cy_Crypto_Core_ECC_GetCurveParams()
184 CY_ALIGN(4) static const uint8_t eccP192PolyBarrett[CY_CRYPTO_ECC_P192_BYTE_SIZE + 1u] = in Cy_Crypto_Core_ECC_GetCurveParams()
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Dcy_cryptolite_ecdsa.c60 CY_ALIGN(4) static const uint8_t eccP192Polynomial[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
67 CY_ALIGN(4) static const uint8_t eccP192PolyBarrett[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE + 1u] = in Cy_Cryptolite_ECC_GetCurveParams()
74 CY_ALIGN(4) static const uint8_t eccP192Order[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
82 CY_ALIGN(4) static const uint8_t eccP192OrderBarrett[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE + 1u] = in Cy_Cryptolite_ECC_GetCurveParams()
91 CY_ALIGN(4) static const uint8_t eccP192BasePointX[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
99 CY_ALIGN(4) static const uint8_t eccP192BasePointY[CY_CRYPTOLITE_ECC_P192_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
108 CY_ALIGN(4) static const uint8_t eccP224Polynomial[CY_CRYPTOLITE_ECC_P224_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
116 CY_ALIGN(4) static const uint8_t eccP224PolyBarrett[CY_CRYPTOLITE_ECC_P224_BYTE_SIZE + 1u] = in Cy_Cryptolite_ECC_GetCurveParams()
124 CY_ALIGN(4) static const uint8_t eccP224Order[CY_CRYPTOLITE_ECC_P224_BYTE_SIZE] = in Cy_Cryptolite_ECC_GetCurveParams()
132 CY_ALIGN(4) static const uint8_t eccP224OrderBarrett[CY_CRYPTOLITE_ECC_P224_BYTE_SIZE + 1u] = in Cy_Cryptolite_ECC_GetCurveParams()
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Dcy_cryptolite_nist_p.c75 CY_ALIGN(4) uint8_t p_t_double[VU_BITS_TO_BYTES(2U*BIT_SIZE)]; // 2*bit_size in Cy_Cryptolite_EC_Bar_MulRed()
76 CY_ALIGN(4) uint8_t t2_plus2[VU_BITS_TO_BYTES(BIT_SIZE+2U+1U)]; // bit_size + 3 in Cy_Cryptolite_EC_Bar_MulRed()
148 CY_ALIGN(4) uint8_t ab_double[VU_BITS_TO_BYTES(2U * BIT_SIZE)]; // the variable size is ignored in Cy_Cryptolite_EC_MulMod()
202 CY_ALIGN(4) uint8_t my_a[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_DivMod()
203 CY_ALIGN(4) uint8_t my_b[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_DivMod()
204 CY_ALIGN(4) uint8_t my_v[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_DivMod()
205 CY_ALIGN(4) uint8_t temp[VU_BITS_TO_BYTES(BIT_SIZE+1U)]; in Cy_Cryptolite_EC_DivMod()
299 CY_ALIGN(4) uint8_t t1[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_XYCZ_ADD()
300 CY_ALIGN(4) uint8_t t2[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_XYCZ_ADD()
363 CY_ALIGN(4) uint8_t t1[VU_BITS_TO_BYTES(BIT_SIZE)]; in Cy_Cryptolite_EC_XYCZ_ADDC()
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Dcy_cryptolite_vu.c58 CY_ALIGN(4) uint8_t temp[VU_BITS_TO_BYTES(VU_TEST_EQUAL_LESS_SIZE)]; in Cy_Cryptolite_Vu_test_equal()
74 CY_ALIGN(4) uint8_t temp[VU_BITS_TO_BYTES(VU_TEST_EQUAL_LESS_SIZE+1U)]={0}; in Cy_Cryptolite_Vu_test_less_than()
Dcy_crypto_core_cmac_v2.c322 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static const uint8_t p_padding[16] = in Cy_Crypto_Core_V2_Cmac_Finish()
481 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_v2_cmac_buffers_t cmacBuffersData; in Cy_Crypto_Core_V2_Cmac()
482 …CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_v2_cmac_state_t cmacStateLoc = {{CY_CRYPTO_… in Cy_Crypto_Core_V2_Cmac()
Dcy_cryptolite_hkdf.c80 CY_ALIGN(4) uint8_t nullSalt[CY_CRYPTOLITE_SHA256_HASH_SIZE] = {0u}; in Cy_Cryptolite_Hkdf_Extract()
288 CY_ALIGN(4) uint8_t prk[CY_CRYPTOLITE_SHA256_HASH_SIZE] = {0u}; in Cy_Cryptolite_Hkdf()
Dcy_crypto_core_hkdf_v2.c210 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_v2_hmac_buffers_t hmacBuffer; in Cy_Crypto_Core_V2_Hkdf_Expand()
211 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_hmac_state_t hmacState; in Cy_Crypto_Core_V2_Hkdf_Expand()
Dcy_cryptolite_cmac.c280 CY_ALIGN(4) uint8_t subkey[16]; in Cy_Cryptolite_Cmac_Finish()
281 CY_ALIGN(4) uint8_t zeromsg[16]; in Cy_Cryptolite_Cmac_Finish()
Dcy_flash_srom.c21 CY_ALIGN(32) static un_srom_api_scrach_sram_t g_scratch; // This must locate on SRAM.
23 CY_ALIGN(32) static un_srom_api_args_2_t g_scratch2; // This must locate on SRAM.
Dcy_crypto_core_hmac_v2.c456 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_hmac_state_t hmacState; in Cy_Crypto_Core_V2_Hmac()
457 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static cy_stc_crypto_v2_hmac_buffers_t hmacBuffer; in Cy_Crypto_Core_V2_Hmac()
Dcy_efuse.c48 CY_ALIGN(32) static volatile uint32_t opcode = 0UL;
/hal_infineon-latest/mtb-pdl-cat1/drivers/include/
Dcy_cryptolite_ecdsa.h131 CY_ALIGN(4) uint8_t my_BARRETT_U[4*VU_BITS_TO_WORDS(BIT_SIZE+1)];
132 CY_ALIGN(4) uint8_t my_P[4*VU_BITS_TO_WORDS(BIT_SIZE)];
133 CY_ALIGN(4) uint8_t dividend[4*VU_BITS_TO_WORDS(BIT_SIZE)];
134 CY_ALIGN(4) uint8_t p_r[4*VU_BITS_TO_WORDS(BIT_SIZE)];
135 CY_ALIGN(4) uint8_t p_s[4*VU_BITS_TO_WORDS(BIT_SIZE)];
136 CY_ALIGN(4) uint8_t p_u1[4*VU_BITS_TO_WORDS(BIT_SIZE)];
137 CY_ALIGN(4) uint8_t p_u2[4*VU_BITS_TO_WORDS(BIT_SIZE)];
138 CY_ALIGN(4) uint8_t p_o[4*VU_BITS_TO_WORDS(BIT_SIZE)];
139 CY_ALIGN(4) uint8_t p_gx[4*VU_BITS_TO_WORDS(BIT_SIZE)];
140 CY_ALIGN(4) uint8_t p_gy[4*VU_BITS_TO_WORDS(BIT_SIZE)];
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Dcy_cryptolite_aes.h69 CY_ALIGN(4) uint32_t key[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
71 CY_ALIGN(4) uint32_t src[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
72 CY_ALIGN(4) uint32_t dst[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
75 CY_ALIGN(4) uint32_t block0[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
79 CY_ALIGN(4) uint32_t block1[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
83 CY_ALIGN(4) uint32_t block2[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
84 CY_ALIGN(4) uint32_t block3[CY_CRYPTOLITE_AES_MAX_KEY_SIZE_U32];
87 CY_ALIGN(4) uint8_t unProcessedData[CY_CRYPTOLITE_AES_BLOCK_SIZE];
88 CY_ALIGN(4) uint8_t iv[CY_CRYPTOLITE_AES_BLOCK_SIZE];
91 CY_ALIGN(4) uint8_t temp[CY_CRYPTOLITE_AES_BLOCK_SIZE];
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Dcy_crypto_core_cmac_v2.h46 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
53 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
62 CY_ALIGN(32) cy_stc_crypto_aes_buffers_t aesBuffersData;
63 CY_ALIGN(32) uint8_t k[CY_CRYPTO_AES_BLOCK_SIZE];
64 CY_ALIGN(32) uint8_t temp[CY_CRYPTO_AES_BLOCK_SIZE];
Dcy_crypto_common.h64 #define CRYPTO_MEM_ALIGN CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
72 #define CRYPTO_MEM_ALIGN_4 CY_ALIGN(4)
969 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
1080 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) typedef struct
1578 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
1591 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
1597 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
1605 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
Dcy_cryptolite_hmac.h69 CY_ALIGN(4) uint8_t ipad[CY_CRYPTOLITE_HMAC_MAX_PAD_SIZE];
70 CY_ALIGN(4) uint8_t opad[CY_CRYPTOLITE_HMAC_MAX_PAD_SIZE];
71 CY_ALIGN(4) uint8_t m0Key[CY_CRYPTOLITE_SHA256_BLOCK_SIZE];
Dcy_crypto_core_sha_v2.h74 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
96 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
104 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
Dcy_cryptolite_rsa.h92 CY_ALIGN(4)
128 CY_ALIGN(4) uint8_t p_buffer[CY_CRYPTOLITE_RSA_BUFFER_SIZE];
130 CY_ALIGN(4) uint32_t dummy[1u];
Dcy_crypto_core_hmac_v2.h52 CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
/hal_infineon-latest/core-lib/include/
Dcy_utils.h169 #define CY_ALIGN(align) __ALIGNED(align) macro
187 #define CY_ALIGN(align) __ALIGNED(align) macro
197 #define CY_ALIGN(align) CY_PRAGMA(data_alignment = align) macro
199 #define CY_ALIGN(align) __ALIGNED(align) macro
/hal_infineon-latest/mtb-hal-cat1/include_pvt/
Dcyhal_ipc_impl.h205 …t _cyhal_ipc_queue_pool[L1_DCACHE_ROUND_UP_BYTES(ITEMSIZE * NUM_ITEMS)] CY_ALIGN(__SCB_DCACHE_LINE…
224 …CY_SECTION_SHAREDMEM static cyhal_ipc_queue_t _cyhal_ipc_queue_handle CY_ALIGN(__SCB_DCACHE_LINE_S…
Dcyhal_hw_resources.h117 #define _CYHAL_DMA_ALIGN CY_ALIGN(8)
119 #define _CYHAL_DMA_ALIGN CY_ALIGN(__SCB_DCACHE_LINE_SIZE)
/hal_infineon-latest/core-lib/
DREADME.md39 …oss compiler compatible code. Use the CY_NOINIT, CY_SECTION, CY_UNUSED, CY_ALIGN attributes at the…
44 * `CY_ALIGN`
DRELEASE.md35 …oss compiler compatible code. Use the CY_NOINIT, CY_SECTION, CY_UNUSED, CY_ALIGN attributes at the…
40 * CY_ALIGN
/hal_infineon-latest/mtb-hal-cat1/source/
Dcyhal_ipc.c334 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) in _cyhal_ipc_sema_init()
1139 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) in cyhal_ipc_queue_init()
1147 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) in cyhal_ipc_queue_init()
1155 CY_ALIGN(__SCB_DCACHE_LINE_SIZE) in cyhal_ipc_queue_init()

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