Searched refs:CPUSS_TRIM_RAM_CTL (Results 1 – 4 of 4) sorted by relevance
2221 CPUSS_TRIM_RAM_CTL = (CPUSS_TRIM_RAM_CTL & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RM_Msk)) | in SetReadMarginTrimUlp()2229 …CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_HALF_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK… in SetReadMarginTrimUlp()2230 (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimUlp()2251 CPUSS_TRIM_RAM_CTL = (CPUSS_TRIM_RAM_CTL & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RM_Msk)) | in SetReadMarginTrimLp()2259 … CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_LP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) | in SetReadMarginTrimLp()2260 (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK); in SetReadMarginTrimLp()2281 CPUSS_TRIM_RAM_CTL = (CPUSS_TRIM_RAM_CTL & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_WA_Msk)) | in SetWriteAssistTrimUlp()2286 … CPUSS_TRIM_RAM_CTL = (SFLASH_CPUSS_TRIM_RAM_CTL_ULP & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_RA_MASK)) | in SetWriteAssistTrimUlp()2287 (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_RA_MASK); in SetWriteAssistTrimUlp()2306 CPUSS_TRIM_RAM_CTL = (CPUSS_TRIM_RAM_CTL & ((uint32_t) ~CPUSS_TRIM_RAM_CTL_WA_Msk)) | in SetWriteAssistTrimLp()[all …]
2287 uint32_t ramVoltgeTrim = CPUSS_TRIM_RAM_CTL; in SetMemoryVoltageTrims()2322 CPUSS_TRIM_RAM_CTL = ramVoltgeTrim; in SetMemoryVoltageTrims()2497 uint32_t trimRamCheckVal = (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_WC_MASK); in IsVoltageChangePossible()2499 CPUSS_TRIM_RAM_CTL &= ~CPUSS_TRIM_RAM_CTL_WC_MASK; in IsVoltageChangePossible()2500 CPUSS_TRIM_RAM_CTL |= ((~trimRamCheckVal) & CPUSS_TRIM_RAM_CTL_WC_MASK); in IsVoltageChangePossible()2502 retVal = (trimRamCheckVal != (CPUSS_TRIM_RAM_CTL & CPUSS_TRIM_RAM_CTL_WC_MASK)); in IsVoltageChangePossible()
783 #define CPUSS_TRIM_RAM_CTL (*(volatile uint32_t *) (cy_device->cpussBase + cy_devi… macro
1575 #define CPUSS_TRIM_RAM_CTL (((CPUSS_Type*) CPUSS_BASE)->TRIM_RAM_CTL) macro
