Searched refs:CPUSS_RAM0_CTL0 (Results 1 – 6 of 6) sorted by relevance
466 CPUSS_RAM0_CTL0 = _CLR_SET_FLD32U(CPUSS_RAM0_CTL0, CPUSS_RAM0_CTL0_SLOW_WS, waitStates); in Cy_SysLib_SetWaitStates()467 CPUSS_RAM0_CTL0 = _CLR_SET_FLD32U(CPUSS_RAM0_CTL0, CPUSS_RAM0_CTL0_FAST_WS, 0UL); in Cy_SysLib_SetWaitStates()
25 #define CPUSS_RAM0_CTL0 0x40201300 macro109 ldr r1, =CPUSS_RAM0_CTL0
33 CPUSS_RAM0_CTL0 EQU 0x40201300 define112 LDR r1, =CPUSS_RAM0_CTL0
54 CPUSS_RAM0_CTL0 EQU 0x40201300 define175 LDR r1, =CPUSS_RAM0_CTL0
788 #define CPUSS_RAM0_CTL0 (*(volatile uint32_t *) (cy_device->cpussBase + cy_devi… macro
518 #define CPUSS_RAM0_CTL0 ((((CPUSS_Type *)(CPUSS_BASE))->RAM0_CTL0)) macro
