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Searched refs:CPUSS_CM7_1_SYSTEM_INT_CTL (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_sysint.c257CPUSS_CM7_1_SYSTEM_INT_CTL[devIntrSrc] = _VAL2FLD(CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_IDX, IRQn) in Cy_SysInt_SetInterruptSource()
327 …T_ENABLE == _FLD2VAL(CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_VALID, CPUSS_CM7_1_SYSTEM_INT_CTL[devIntrS… in Cy_SysInt_GetNvicConnection()
329 …tempReg = _FLD2VAL(CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_IDX, CPUSS_CM7_1_SYSTEM_INT_CTL[devIntrSrc]); in Cy_SysInt_GetNvicConnection()
556 CPUSS_CM7_1_SYSTEM_INT_CTL[sysIntSrc] |= CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_VALID_Msk; in Cy_SysInt_EnableSystemInt()
/hal_infineon-latest/mtb-hal-cat1/include_pvt/
Dcyhal_irq_impl.h240 …return (0u != (CPUSS_CM7_1_SYSTEM_INT_CTL[system_irq] & CPUSS_CM7_1_SYSTEM_INT_CTL_CPU_INT_VALID_M… in _cyhal_irq_is_enabled()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h533 #define CPUSS_CM7_1_SYSTEM_INT_CTL (((CPUSS_Type *)(CPUSS_BASE))->CM7_1_SYSTEM_INT_CTL) macro