Home
last modified time | relevance | path

Searched refs:CM0_VECTOR_TABLE_BASE (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-latest/mtb-template-cat1/files/templates/cat1c/COMPONENT_MTB/COMPONENT_CM0P/TOOLCHAIN_IAR/
Dstartup_cm0plus.s96 …; align to 256 byte, because CM0_VECTOR_TABLE_BASE register only supports address bits [31:8] (Not…
144 …imum requirement would be 128 bytes if not used in combination with CM0_VECTOR_TABLE_BASE register)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_cpuss.h91 __IOM uint32_t CM0_VECTOR_TABLE_BASE; /*!< 0x000002B0 CM0+ vector table base */ member
Dcyip_cpuss_v2.h75 __IOM uint32_t CM0_VECTOR_TABLE_BASE; /*!< 0x00001120 CM0+ vector table base */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_cpuss.h82 __IOM uint32_t CM0_VECTOR_TABLE_BASE; /*!< 0x00001120 CM0+ vector table base */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe_remaps.h1141 __IOM uint32_t CM0_VECTOR_TABLE_BASE; /*!< 0x000002B0 CM0+ vector table base */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h515 #define CPUSS_CM0_VECTOR_TABLE_BASE ((((CPUSS_Type *)(CPUSS_BASE))->CM0_VECTOR_TABLE_BASE))