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Searched refs:CFG_IN (Results 1 – 9 of 9) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/
Dcy_device.c134 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V1_Type, CFG_IN),
256 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
376 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
496 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
617 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
738 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
865 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_IN),
985 /* gpioPrtCfgInOffset */ (uint8_t)offsetof(GPIO_PRT_Type, CFG_IN),
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_gpio_v3.h55 …__IOM uint32_t CFG_IN; /*!< 0x00000048 Port input buffer configuration regi… member
Dcyip_gpio_v5.h55 …__IOM uint32_t CFG_IN; /*!< 0x00000048 Port input buffer configuration regi… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_gpio.h54 …__IOM uint32_t CFG_IN; /*!< 0x0000002C Port input buffer configuration regi… member
Dcyip_gpio_v2.h55 …__IOM uint32_t CFG_IN; /*!< 0x00000048 Port input buffer configuration regi… member
Dcyip_gpio_v5.h55 …__IOM uint32_t CFG_IN; /*!< 0x00000048 Port input buffer configuration regi… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_gpio.h55 …__IOM uint32_t CFG_IN; /*!< 0x00000048 Port input buffer configuration regi… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1990 #define GPIO_PRT_CFG_IN(base) (((GPIO_PRT_Type*)(base))->CFG_IN)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h568 #define GPIO_PRT_CFG_IN(base) (((GPIO_PRT_Type*)(base))->CFG_IN)