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Searched refs:CFGL (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/XMCLib/drivers/src/
Dxmc_dma.c340 dma->CH[channel].CFGL = (uint32_t)((uint32_t)config->priority | in XMC_DMA_CH_Init()
373 dma->CH[channel].CFGL &= (uint32_t)~GPDMA0_CH_CFGL_HS_SEL_DST_Msk; in XMC_DMA_CH_Init()
399 dma->CH[channel].CFGL &= (uint32_t)~GPDMA0_CH_CFGL_HS_SEL_SRC_Msk; in XMC_DMA_CH_Init()
415 dma->CH[channel].CFGL |= (uint32_t)GPDMA0_CH_CFGL_RELOAD_DST_Msk; in XMC_DMA_CH_Init()
419 dma->CH[channel].CFGL |= (uint32_t)GPDMA0_CH_CFGL_RELOAD_SRC_Msk; in XMC_DMA_CH_Init()
423 dma->CH[channel].CFGL |= (uint32_t)((uint32_t)GPDMA0_CH_CFGL_RELOAD_DST_Msk | in XMC_DMA_CH_Init()
432 dma->CH[channel].CFGL |= (uint32_t)GPDMA0_CH_CFGL_RELOAD_SRC_Msk; in XMC_DMA_CH_Init()
441 dma->CH[channel].CFGL |= (uint32_t)GPDMA0_CH_CFGL_RELOAD_DST_Msk; in XMC_DMA_CH_Init()
473 dma->CH[channel].CFGL |= (uint32_t)GPDMA0_CH_CFGL_CH_SUSP_Msk; in XMC_DMA_CH_Suspend()
479 dma->CH[channel].CFGL &= (uint32_t)~GPDMA0_CH_CFGL_CH_SUSP_Msk; in XMC_DMA_CH_Resume()
[all …]
/hal_infineon-latest/XMCLib/drivers/inc/
Dxmc_dma.h287 __IO uint32_t CFGL; member
/hal_infineon-latest/XMCLib/devices/XMC4500/Include/
DXMC4500.h621 …__IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low … member
646 …__IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low … member
743 …__IO uint32_t CFGL; /*!< (@ 0x50018040) Configuration Register Low … member
/hal_infineon-latest/XMCLib/devices/XMC4700/Include/
DXMC4700.h636 …__IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low … member
661 …__IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low … member
758 …__IO uint32_t CFGL; /*!< (@ 0x50018040) Configuration Register Low … member
/hal_infineon-latest/XMCLib/devices/XMC4800/Include/
DXMC4800.h643 …__IO uint32_t CFGL; /*!< (@ 0x50014040) Configuration Register Low … member
668 …__IO uint32_t CFGL; /*!< (@ 0x500140F0) Configuration Register Low … member
765 …__IO uint32_t CFGL; /*!< (@ 0x50018040) Configuration Register Low … member