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Searched refs:BLESS (Results 1 – 25 of 43) sorted by relevance

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/hal_infineon-latest/bless/include/
Dcycfg_ble.h43 …oth Configurator requires a newer version of the PSoC 6 BLESS Middleware. Update the PSoC 6 BLESS …
Dcy_ble.h541 BLE->BLESS.EXT_PA_LNA_CTRL = controlValue; in Cy_BLE_ConfigureExtPA()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1921 #define BLE_BLESS_XTAL_CLK_DIV_CONFIG (((BLE_V1_Type *) BLE_BASE)->BLESS.XTAL_CLK_DIV_CONFIG)
1922 #define BLE_BLESS_MT_CFG (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_CFG)
1923 #define BLE_BLESS_MT_STATUS (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_STATUS)
1924 #define BLE_BLESS_MT_DELAY_CFG (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG)
1925 #define BLE_BLESS_MT_DELAY_CFG2 (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG2)
1926 #define BLE_BLESS_MT_DELAY_CFG3 (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG3)
1927 #define BLE_BLESS_MT_VIO_CTRL (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_VIO_CTRL)
1928 #define BLE_BLESS_LL_CLK_EN (((BLE_V1_Type *) BLE_BASE)->BLESS.LL_CLK_EN)
1929 #define BLE_BLESS_MISC_EN_CTRL (((BLE_V1_Type *) BLE_BASE)->BLESS.MISC_EN_CTRL)
1930 #define BLE_BLESS_INTR_STAT (((BLE_V1_Type *) BLE_BASE)->BLESS.INTR_STAT)
Dcy8c6336lqi_blf42.h875 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6337bzi_blf13.h865 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6316bzi_blf03.h865 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6316bzi_blf04.h868 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6336bzi_blf03.h865 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6336bzi_blf04.h868 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6336lqi_blf02.h865 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347fmi_bud13.h1093 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c68237bz_ble.h1094 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c68237fm_ble.h1094 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347bzi_bld43.h1100 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347bzi_bld44.h1103 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347fmi_bld13.h1090 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347fmi_bld43.h1100 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347fmi_bud43.h1103 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6347bzi_bud43.h1103 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6316bzi_blf53.h940 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6316bzi_blf54.h943 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6336bzi_bld13.h1090 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
Dcy8c6336bzi_bld14.h1093 #define BLE_BLESS ((BLE_BLESS_Type*) &BLE->BLESS) …
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h2312 #define BLE_BLESS_XTAL_CLK_DIV_CONFIG (((BLE_V1_Type *) BLE_BASE)->BLESS.XTAL_CLK_DIV_CONFIG)
2313 #define BLE_BLESS_MT_CFG (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_CFG)
2314 #define BLE_BLESS_MT_STATUS (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_STATUS)
2315 #define BLE_BLESS_MT_DELAY_CFG (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG)
2316 #define BLE_BLESS_MT_DELAY_CFG2 (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG2)
2317 #define BLE_BLESS_MT_DELAY_CFG3 (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_DELAY_CFG3)
2318 #define BLE_BLESS_MT_VIO_CTRL (((BLE_V1_Type *) BLE_BASE)->BLESS.MT_VIO_CTRL)
2319 #define BLE_BLESS_LL_CLK_EN (((BLE_V1_Type *) BLE_BASE)->BLESS.LL_CLK_EN)
2320 #define BLE_BLESS_MISC_EN_CTRL (((BLE_V1_Type *) BLE_BASE)->BLESS.MISC_EN_CTRL)
2321 #define BLE_BLESS_INTR_STAT (((BLE_V1_Type *) BLE_BASE)->BLESS.INTR_STAT)
/hal_infineon-latest/btstack/
DRELEASE.md59 - Fix issue setting default Tx power with CY BLESS controller.

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