Searched refs:tx_desc (Results 1 – 2 of 2) sorted by relevance
316 eth_mac->tx_desc[i].status = ETH_MAC_DMA_TDES0_TCH | ETH_MAC_DMA_TDES0_LS | ETH_MAC_DMA_TDES0_FS; in XMC_ETH_MAC_InitTxDescriptors()317 eth_mac->tx_desc[i].buffer1 = (uint32_t)&(eth_mac->tx_buf[i * XMC_ETH_MAC_BUF_SIZE]); in XMC_ETH_MAC_InitTxDescriptors()323 eth_mac->tx_desc[i].buffer2 = (uint32_t)&(eth_mac->tx_desc[next]); in XMC_ETH_MAC_InitTxDescriptors()325 eth_mac->regs->TRANSMIT_DESCRIPTOR_LIST_ADDRESS = (uint32_t)&(eth_mac->tx_desc[0]); in XMC_ETH_MAC_InitTxDescriptors()399 if (eth_mac->tx_desc[eth_mac->tx_index].status & ETH_MAC_DMA_TDES0_OWN) in XMC_ETH_MAC_SendFrame()416 dst = (uint8_t *)eth_mac->tx_desc[eth_mac->tx_index].buffer1; in XMC_ETH_MAC_SendFrame()417 eth_mac->tx_desc[eth_mac->tx_index].length = len; in XMC_ETH_MAC_SendFrame()422 eth_mac->tx_desc[eth_mac->tx_index].length += len; in XMC_ETH_MAC_SendFrame()435 ctrl = eth_mac->tx_desc[eth_mac->tx_index].status | ETH_MAC_DMA_TDES0_CIC; in XMC_ETH_MAC_SendFrame()449 eth_mac->tx_desc[eth_mac->tx_index].status = ctrl | ETH_MAC_DMA_TDES0_OWN; in XMC_ETH_MAC_SendFrame()[all …]
381 XMC_ETH_MAC_DMA_DESC_t *tx_desc; /**< DMA descriptor: TX */ member1333 return ((eth_mac->tx_desc[eth_mac->tx_index].status & ETH_MAC_DMA_TDES0_OWN) != 0U); in XMC_ETH_MAC_IsTxDescriptorOwnedByDma()1475 return (uint8_t *)(eth_mac->tx_desc[eth_mac->tx_index].buffer1); in XMC_ETH_MAC_GetTxBuffer()1500 eth_mac->tx_desc[eth_mac->tx_index].length = size; in XMC_ETH_MAC_SetTxBufferSize()
