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Searched refs:rxClockSel (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.7.0/mtb-template-cat1/files/cat1b/
Dcybsp_smif_init.c250 .rxClockSel = (uint32_t)CY_SMIF_SEL_INVERTED_FEEDBACK_CLK,
/hal_infineon-3.7.0/mtb-hal-cat1/source/
Dcyhal_qspi.c1035 .rxClockSel = (uint32_t)CY_SMIF_SEL_INVERTED_FEEDBACK_CLK, in cyhal_qspi_init()
1037 .rxClockSel = (uint32_t)CY_SMIF_SEL_INV_INTERNAL_CLK, in cyhal_qspi_init()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/source/
Dcy_smif.c106 CY_ASSERT_L3(CY_SMIF_CLOCK_SEL_VALID(config->rxClockSel)); in Cy_SMIF_Init()
113 _VAL2FLD(SMIF_CTL_CLOCK_IF_RX_SEL, config->rxClockSel) | in Cy_SMIF_Init()
/hal_infineon-3.7.0/mtb-pdl-cat1/drivers/include/
Dcy_smif.h1159 uint32_t rxClockSel; /**< Specifies the clock source for the receiver member